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@@ -0,0 +1,472 @@
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+/* This file is the part of the Lightweight USB device Stack for STM32 microcontrollers
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+ *
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+ * Copyright ©2016 Dmitry Filimonchuk <dmitrystu[at]gmail[dot]com>
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+ *
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+ * Licensed under the Apache License, Version 2.0 (the "License");
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+ * you may not use this file except in compliance with the License.
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+ * You may obtain a copy of the License at
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+ * http://www.apache.org/licenses/LICENSE-2.0
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+ * Unless required by applicable law or agreed to in writing, software
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+ * distributed under the License is distributed on an "AS IS" BASIS,
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+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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+ * See the License for the specific language governing permissions and
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+ * limitations under the License.
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+ */
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+
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+#include <stdint.h>
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+#include <stdbool.h>
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+#include "stm32.h"
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+#include "usb.h"
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+
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+#if defined(USBD_STM32L433)
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+
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+#ifndef USB_PMASIZE
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+ #warning PMA memory size is not defined. Use 1k by default
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+ #define USB_PMASIZE 0x400
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+#endif
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+
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+#define USB_EP_SWBUF_TX USB_EP_DTOG_RX
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+#define USB_EP_SWBUF_RX USB_EP_DTOG_TX
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+
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+#define EP_TOGGLE_SET(epr, bits, mask) *(epr) = (*(epr) ^ (bits)) & (USB_EPREG_MASK | (mask))
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+
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+#define EP_TX_STALL(epr) EP_TOGGLE_SET((epr), USB_EP_TX_STALL, USB_EPTX_STAT)
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+#define EP_RX_STALL(epr) EP_TOGGLE_SET((epr), USB_EP_RX_STALL, USB_EPRX_STAT)
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+#define EP_TX_UNSTALL(epr) EP_TOGGLE_SET((epr), USB_EP_TX_NAK, USB_EPTX_STAT | USB_EP_DTOG_TX)
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+#define EP_RX_UNSTALL(epr) EP_TOGGLE_SET((epr), USB_EP_RX_VALID, USB_EPRX_STAT | USB_EP_DTOG_RX)
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+#define EP_DTX_UNSTALL(epr) EP_TOGGLE_SET((epr), USB_EP_TX_VALID, USB_EPTX_STAT | USB_EP_DTOG_TX | USB_EP_SWBUF_TX)
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+#define EP_DRX_UNSTALL(epr) EP_TOGGLE_SET((epr), USB_EP_RX_VALID | USB_EP_SWBUF_RX, USB_EPRX_STAT | USB_EP_DTOG_RX | USB_EP_SWBUF_RX)
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+#define EP_TX_VALID(epr) EP_TOGGLE_SET((epr), USB_EP_TX_VALID, USB_EPTX_STAT)
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+#define EP_RX_VALID(epr) EP_TOGGLE_SET((epr), USB_EP_RX_VALID, USB_EPRX_STAT)
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+
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+#define STATUS_VAL(x) (USBD_HW_BC | (x))
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+
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+typedef struct {
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+ uint16_t addr;
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+ uint16_t cnt;
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+} pma_rec;
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+
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+typedef union pma_table {
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+ struct {
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+ pma_rec tx;
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+ pma_rec rx;
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+ };
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+ struct {
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+ pma_rec tx0;
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+ pma_rec tx1;
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+ };
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+ struct {
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+ pma_rec rx0;
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+ pma_rec rx1;
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+ };
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+} pma_table;
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+
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+
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+/** \brief Helper function. Returns pointer to the buffer descriptor table.
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+ */
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+inline static pma_table *EPT(uint8_t ep) {
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+ return (pma_table*)((ep & 0x07) * 8 + USB_PMAADDR);
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+
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+}
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+
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+/** \brief Helper function. Returns pointer to the endpoint control register.
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+ */
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+inline static volatile uint16_t *EPR(uint8_t ep) {
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+ return (uint16_t*)((ep & 0x07) * 4 + USB_BASE);
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+}
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+
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+
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+/** \brief Helper function. Returns next available PMA buffer.
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+ *
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+ * \param sz uint16_t Requested buffer size.
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+ * \return uint16_t Buffer address for PMA table.
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+ * \note PMA buffers grown from top to bottom like stack.
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+ */
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+static uint16_t get_next_pma(uint16_t sz) {
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+ unsigned _result = USB_PMASIZE;
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+ for (int i = 0; i < 8; i++) {
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+ pma_table *tbl = EPT(i);
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+ if ((tbl->rx.addr) && (tbl->rx.addr < _result)) _result = tbl->rx.addr;
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+ if ((tbl->tx.addr) && (tbl->tx.addr < _result)) _result = tbl->tx.addr;
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+ }
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+ return (_result < (0x020 + sz)) ? 0 : (_result - sz);
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+}
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+
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+uint32_t getinfo(void) {
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+ if (!(RCC->APB1ENR1 & RCC_APB1ENR1_USBFSEN)) return STATUS_VAL(0);
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+ if (USB->BCDR & USB_BCDR_DPPU) return STATUS_VAL(USBD_HW_ENABLED | USBD_HW_SPEED_FS);
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+ return STATUS_VAL(USBD_HW_ENABLED);
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+}
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+
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+void ep_setstall(uint8_t ep, bool stall) {
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+ volatile uint16_t *reg = EPR(ep);
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+ /* ISOCHRONOUS endpoint can't be stalled or unstalled */
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+ if (USB_EP_ISOCHRONOUS == (*reg & USB_EP_T_FIELD)) return;
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+ /* If it's an IN endpoint */
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+ if (ep & 0x80) {
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+ /* DISABLED endpoint can't be stalled or unstalled */
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+ if (USB_EP_TX_DIS == (*reg & USB_EPTX_STAT)) return;
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+ if (stall) {
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+ EP_TX_STALL(reg);
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+ } else {
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+ /* if it's a doublebuffered endpoint */
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+ if ((USB_EP_KIND | USB_EP_BULK) == (*reg & (USB_EP_T_FIELD | USB_EP_KIND))) {
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+ /* set endpoint to VALID and clear DTOG_TX & SWBUF_TX */
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+ EP_DTX_UNSTALL(reg);
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+ } else {
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+ /* set endpoint to NAKED and clear DTOG_TX */
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+ EP_TX_UNSTALL(reg);
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+ }
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+ }
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+ } else {
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+ if (USB_EP_RX_DIS == (*reg & USB_EPRX_STAT)) return;
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+ if (stall) {
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+ EP_RX_STALL(reg);
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+ } else {
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+ /* if it's a doublebuffered endpoint */
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+ if ((USB_EP_KIND | USB_EP_BULK) == (*reg & (USB_EP_T_FIELD | USB_EP_KIND))) {
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+ /* set endpoint to VALID, clear DTOG_RX, set SWBUF_RX */
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+ EP_DRX_UNSTALL(reg);
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+ } else {
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+ /* set endpoint to VALID and clear DTOG_RX */
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+ EP_RX_UNSTALL(reg);
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+ }
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+ }
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+ }
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+}
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+
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+bool ep_isstalled(uint8_t ep) {
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+ if (ep & 0x80) {
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+ return (USB_EP_TX_STALL == (USB_EPTX_STAT & *EPR(ep)));
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+ } else {
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+ return (USB_EP_RX_STALL == (USB_EPRX_STAT & *EPR(ep)));
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+ }
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+}
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+
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+void enable(bool enable) {
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+ if (enable) {
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+ RCC->APB1ENR1 |= RCC_APB1ENR1_USBFSEN;
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+ RCC->APB1RSTR1 |= RCC_APB1RSTR1_USBFSRST;
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+ RCC->APB1RSTR1 &= ~RCC_APB1RSTR1_USBFSRST;
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+ USB->CNTR = USB_CNTR_CTRM | USB_CNTR_RESETM | USB_CNTR_ERRM |
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+#if !defined(USBD_SOF_DISABLED)
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+ USB_CNTR_SOFM |
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+#endif
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+ USB_CNTR_SUSPM | USB_CNTR_WKUPM;
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+ } else if (RCC->APB1ENR1 & RCC_APB1ENR1_USBFSEN) {
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+ USB->BCDR = 0;
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+ RCC->APB1RSTR1 |= RCC_APB1RSTR1_USBFSRST;
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+ RCC->APB1ENR1 &= ~RCC_APB1ENR1_USBFSEN;
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+ }
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+}
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+
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+uint8_t connect(bool connect) {
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+ uint8_t res;
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+ USB->BCDR = USB_BCDR_BCDEN | USB_BCDR_DCDEN;
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+ if (USB->BCDR & USB_BCDR_DCDET) {
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+ USB->BCDR = USB_BCDR_BCDEN | USB_BCDR_PDEN;
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+ if (USB->BCDR & USB_BCDR_PS2DET) {
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+ res = usbd_lane_unk;
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+ } else if (USB->BCDR & USB_BCDR_PDET) {
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+ USB->BCDR = USB_BCDR_BCDEN | USB_BCDR_SDEN;
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+ if (USB->BCDR & USB_BCDR_SDET) {
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+ res = usbd_lane_dcp;
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+ } else {
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+ res = usbd_lane_cdp;
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+ }
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+ } else {
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+ res = usbd_lane_sdp;
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+ }
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+ } else {
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+ res = usbd_lane_dsc;
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+ }
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+ USB->BCDR = (connect) ? USB_BCDR_DPPU : 0;
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+ return res;
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+}
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+
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+void setaddr (uint8_t addr) {
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+ USB->DADDR = USB_DADDR_EF | addr;
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+}
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+
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+bool ep_config(uint8_t ep, uint8_t eptype, uint16_t epsize) {
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+ volatile uint16_t *reg = EPR(ep);
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+ pma_table *tbl = EPT(ep);
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+ /* epsize should be 16-bit aligned */
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+ if (epsize & 0x01) epsize++;
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+
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+ switch (eptype) {
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+ case USB_EPTYPE_CONTROL:
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+ *reg = USB_EP_CONTROL | (ep & 0x07);
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+ break;
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+ case USB_EPTYPE_ISOCHRONUS:
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+ *reg = USB_EP_ISOCHRONOUS | (ep & 0x07);
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+ break;
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+ case USB_EPTYPE_BULK:
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+ *reg = USB_EP_BULK | (ep & 0x07);
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+ break;
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+ case USB_EPTYPE_BULK | USB_EPTYPE_DBLBUF:
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+ *reg = USB_EP_BULK | USB_EP_KIND | (ep & 0x07);
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+ break;
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+ default:
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+ *reg = USB_EP_INTERRUPT | (ep & 0x07);
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+ break;
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+ }
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+ /* if it TX or CONTROL endpoint */
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+ if ((ep & 0x80) || (eptype == USB_EPTYPE_CONTROL)) {
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+ uint16_t _pma;
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+ _pma = get_next_pma(epsize);
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+ if (_pma == 0) return false;
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+ tbl->tx.addr = _pma;
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+ tbl->tx.cnt = 0;
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+ if ((eptype == USB_EPTYPE_ISOCHRONUS) ||
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+ (eptype == (USB_EPTYPE_BULK | USB_EPTYPE_DBLBUF))) {
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+ _pma = get_next_pma(epsize);
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+ if (_pma == 0) return false;
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+ tbl->tx1.addr = _pma;
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+ tbl->tx1.cnt = 0;
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+ EP_DTX_UNSTALL(reg);
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+ } else {
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+ EP_TX_UNSTALL(reg);
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+ }
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+ }
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+ if (!(ep & 0x80)) {
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+ uint16_t _rxcnt;
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+ uint16_t _pma;
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+ if (epsize > 62) {
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+ if (epsize & 0x1F) {
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+ epsize &= 0x1F;
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+ } else {
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+ epsize -= 0x20;
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+ }
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+ _rxcnt = 0x8000 | (epsize << 5);
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+ epsize += 0x20;
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+ } else {
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+ _rxcnt = epsize << 9;
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+ }
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+ _pma = get_next_pma(epsize);
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+ if (_pma == 0) return false;
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+ tbl->rx.addr = _pma;
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+ tbl->rx.cnt = _rxcnt;
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+ if ((eptype == USB_EPTYPE_ISOCHRONUS) ||
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+ (eptype == (USB_EPTYPE_BULK | USB_EPTYPE_DBLBUF))) {
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+ _pma = get_next_pma(epsize);
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+ if (_pma == 0) return false;
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+ tbl->rx0.addr = _pma;
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+ tbl->rx0.cnt = _rxcnt;
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+ EP_DRX_UNSTALL(reg);
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+ } else {
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+ EP_RX_UNSTALL(reg);
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+ }
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+ }
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+ return true;
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+}
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+
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+void ep_deconfig(uint8_t ep) {
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+ pma_table *ept = EPT(ep);
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+ *EPR(ep) &= ~USB_EPREG_MASK;
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+ ept->rx.addr = 0;
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+ ept->rx.cnt = 0;
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+ ept->tx.addr = 0;
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+ ept->tx.cnt = 0;
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+}
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+
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+static uint16_t pma_read (uint8_t *buf, uint16_t blen, pma_rec *rx) {
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+ uint16_t *pma = (void*)(USB_PMAADDR + rx->addr);
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+ uint16_t rxcnt = rx->cnt & 0x03FF;
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+ rx->cnt &= ~0x3FF;
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+
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+ if (blen > rxcnt) {
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+ blen = rxcnt;
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+ }
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+ rxcnt = blen;
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+ while (blen) {
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+ uint16_t _t = *pma;
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+ *buf++ = _t & 0xFF;
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+ if (--blen) {
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+ *buf++ = _t >> 8;
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+ pma++;
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+ blen--;
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+ } else break;
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+ }
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+ return rxcnt;
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+}
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+
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+int32_t ep_read(uint8_t ep, void *buf, uint16_t blen) {
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+ pma_table *tbl = EPT(ep);
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+ volatile uint16_t *reg = EPR(ep);
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+ switch (*reg & (USB_EPRX_STAT | USB_EP_T_FIELD | USB_EP_KIND)) {
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+ /* doublebuffered bulk endpoint */
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+ case (USB_EP_RX_VALID | USB_EP_BULK | USB_EP_KIND):
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+ /* switching SWBUF if EP is NAKED */
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+ switch (*reg & (USB_EP_DTOG_RX | USB_EP_SWBUF_RX)) {
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+ case 0:
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+ case (USB_EP_DTOG_RX | USB_EP_SWBUF_RX):
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+ *reg = (*reg & USB_EPREG_MASK) | USB_EP_SWBUF_RX;
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+ break;
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+ default:
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+ break;
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+ }
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+ if (*reg & USB_EP_SWBUF_RX) {
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+ return pma_read(buf, blen, &(tbl->rx1));
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+ } else {
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+ return pma_read(buf, blen, &(tbl->rx0));
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+ }
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+ /* isochronous endpoint */
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+ case (USB_EP_RX_VALID | USB_EP_ISOCHRONOUS):
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+ if (*reg & USB_EP_DTOG_RX) {
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+ return pma_read(buf, blen, &(tbl->rx1));
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+ } else {
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+ return pma_read(buf, blen, &(tbl->rx0));
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+ }
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+ /* regular endpoint */
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+ case (USB_EP_RX_NAK | USB_EP_BULK):
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+ case (USB_EP_RX_NAK | USB_EP_CONTROL):
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+ case (USB_EP_RX_NAK | USB_EP_INTERRUPT):
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+ {
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+ int32_t res = pma_read(buf, blen, &(tbl->rx));
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+ /* setting endpoint to VALID state */
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+ EP_RX_VALID(reg);
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+ return res;
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+ }
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+ /* invalid or not ready */
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+ default:
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+ return -1;
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+ }
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+}
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+
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+static void pma_write(uint8_t *buf, uint16_t blen, pma_rec *tx) {
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+ uint16_t *pma = (void*)(USB_PMAADDR + tx->addr);
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+ tx->cnt = blen;
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+ while (blen > 1) {
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+ *pma++ = buf[1] << 8 | buf[0];
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+ buf += 2;
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+ blen -= 2;
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+ }
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+ if (blen) *pma = *buf;
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+}
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+
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+int32_t ep_write(uint8_t ep, void *buf, uint16_t blen) {
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+ pma_table *tbl = EPT(ep);
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+ volatile uint16_t *reg = EPR(ep);
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+ switch (*reg & (USB_EPTX_STAT | USB_EP_T_FIELD | USB_EP_KIND)) {
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+ /* doublebuffered bulk endpoint */
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+ case (USB_EP_TX_NAK | USB_EP_BULK | USB_EP_KIND):
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+ if (*reg & USB_EP_SWBUF_TX) {
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+ pma_write(buf, blen, &(tbl->tx1));
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+ } else {
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+ pma_write(buf, blen, &(tbl->tx0));
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+ }
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|
+ *reg = (*reg & USB_EPREG_MASK) | USB_EP_SWBUF_TX;
|
|
|
+ break;
|
|
|
+ /* isochronous endpoint */
|
|
|
+ case (USB_EP_TX_VALID | USB_EP_ISOCHRONOUS):
|
|
|
+ if (!(*reg & USB_EP_DTOG_TX)) {
|
|
|
+ pma_write(buf, blen, &(tbl->tx1));
|
|
|
+ } else {
|
|
|
+ pma_write(buf, blen, &(tbl->tx0));
|
|
|
+ }
|
|
|
+ break;
|
|
|
+ /* regular endpoint */
|
|
|
+ case (USB_EP_TX_NAK | USB_EP_BULK):
|
|
|
+ case (USB_EP_TX_NAK | USB_EP_CONTROL):
|
|
|
+ case (USB_EP_TX_NAK | USB_EP_INTERRUPT):
|
|
|
+ pma_write(buf, blen, &(tbl->tx));
|
|
|
+ EP_TX_VALID(reg);
|
|
|
+ break;
|
|
|
+ /* invalid or not ready */
|
|
|
+ default:
|
|
|
+ return -1;
|
|
|
+ }
|
|
|
+ return blen;
|
|
|
+}
|
|
|
+
|
|
|
+uint16_t get_frame (void) {
|
|
|
+ return USB->FNR & USB_FNR_FN;
|
|
|
+}
|
|
|
+
|
|
|
+void evt_poll(usbd_device *dev, usbd_evt_callback callback) {
|
|
|
+ uint8_t _ev, _ep;
|
|
|
+ uint16_t _istr = USB->ISTR;
|
|
|
+ _ep = _istr & USB_ISTR_EP_ID;
|
|
|
+ if (_istr & USB_ISTR_CTR) {
|
|
|
+ volatile uint16_t *reg = EPR(_ep);
|
|
|
+ if (*reg & USB_EP_CTR_TX) {
|
|
|
+ *reg &= (USB_EPREG_MASK ^ USB_EP_CTR_TX);
|
|
|
+ _ep |= 0x80;
|
|
|
+ _ev = usbd_evt_eptx;
|
|
|
+ } else {
|
|
|
+ *reg &= (USB_EPREG_MASK ^ USB_EP_CTR_RX);
|
|
|
+ _ev = (*reg & USB_EP_SETUP) ? usbd_evt_epsetup : usbd_evt_eprx;
|
|
|
+ }
|
|
|
+ } else if (_istr & USB_ISTR_RESET) {
|
|
|
+ USB->ISTR &= ~USB_ISTR_RESET;
|
|
|
+ USB->BTABLE = 0;
|
|
|
+ for (int i = 0; i < 8; i++) {
|
|
|
+ ep_deconfig(i);
|
|
|
+ }
|
|
|
+ _ev = usbd_evt_reset;
|
|
|
+#if !defined(USBD_SOF_DISABLED)
|
|
|
+ } else if (_istr & USB_ISTR_SOF) {
|
|
|
+ _ev = usbd_evt_sof;
|
|
|
+ USB->ISTR &= ~USB_ISTR_SOF;
|
|
|
+#endif
|
|
|
+ } else if (_istr & USB_ISTR_WKUP) {
|
|
|
+ _ev = usbd_evt_wkup;
|
|
|
+ USB->CNTR &= ~USB_CNTR_FSUSP;
|
|
|
+ USB->ISTR &= ~USB_ISTR_WKUP;
|
|
|
+ } else if (_istr & USB_ISTR_SUSP) {
|
|
|
+ _ev = usbd_evt_susp;
|
|
|
+ USB->CNTR |= USB_CNTR_FSUSP;
|
|
|
+ USB->ISTR &= ~USB_ISTR_SUSP;
|
|
|
+ } else if (_istr & USB_ISTR_ERR) {
|
|
|
+ USB->ISTR &= ~USB_ISTR_ERR;
|
|
|
+ _ev = usbd_evt_error;
|
|
|
+ } else {
|
|
|
+ return;
|
|
|
+ }
|
|
|
+ callback(dev, _ev, _ep);
|
|
|
+}
|
|
|
+
|
|
|
+static uint32_t fnv1a32_turn (uint32_t fnv, uint32_t data ) {
|
|
|
+ for (int i = 0; i < 4 ; i++) {
|
|
|
+ fnv ^= (data & 0xFF);
|
|
|
+ fnv *= 16777619;
|
|
|
+ data >>= 8;
|
|
|
+ }
|
|
|
+ return fnv;
|
|
|
+}
|
|
|
+
|
|
|
+uint16_t get_serialno_desc(void *buffer) {
|
|
|
+ struct usb_string_descriptor *dsc = buffer;
|
|
|
+ uint16_t *str = dsc->wString;
|
|
|
+ uint32_t fnv = 2166136261;
|
|
|
+ fnv = fnv1a32_turn(fnv, *(uint32_t*)(UID_BASE + 0x00));
|
|
|
+ fnv = fnv1a32_turn(fnv, *(uint32_t*)(UID_BASE + 0x04));
|
|
|
+ fnv = fnv1a32_turn(fnv, *(uint32_t*)(UID_BASE + 0x14));
|
|
|
+ for (int i = 28; i >= 0; i -= 4 ) {
|
|
|
+ uint16_t c = (fnv >> i) & 0x0F;
|
|
|
+ c += (c < 10) ? '0' : ('A' - 10);
|
|
|
+ *str++ = c;
|
|
|
+ }
|
|
|
+ dsc->bDescriptorType = USB_DTYPE_STRING;
|
|
|
+ dsc->bLength = 18;
|
|
|
+ return 18;
|
|
|
+}
|
|
|
+
|
|
|
+ __attribute__((externally_visible)) const struct usbd_driver usbd_devfs = {
|
|
|
+ getinfo,
|
|
|
+ enable,
|
|
|
+ connect,
|
|
|
+ setaddr,
|
|
|
+ ep_config,
|
|
|
+ ep_deconfig,
|
|
|
+ ep_read,
|
|
|
+ ep_write,
|
|
|
+ ep_setstall,
|
|
|
+ ep_isstalled,
|
|
|
+ evt_poll,
|
|
|
+ get_frame,
|
|
|
+ get_serialno_desc,
|
|
|
+};
|
|
|
+
|
|
|
+#endif //USBD_STM32L052
|
