stm32f401,stm32x411 fix and demos (#74)

* stm32f401/f411 demo

* 401/411 works fine with 405 driver

Makefile

@@ -240,4 +240,11 @@ stm32f405xg_hs: clean
 	@$(MAKE) demo STARTUP='$(CMSISDEV)/ST/STM32F4xx/Source/Templates/gcc/startup_stm32f405xx.s' \
 						LDSCRIPT='demo/stm32f405xg.ld' \
 						DEFINES='STM32F4 STM32F405xx USBD_SOF_DISABLED USBD_PRIMARY_OTGHS' \
-						CFLAGS='-mcpu=cortex-m4'
+						CFLAGS='-mcpu=cortex-m4'
+
+
+stm32f401xc: clean
+	@$(MAKE) demo STARTUP='$(CMSISDEV)/ST/STM32F4xx/Source/Templates/gcc/startup_stm32f401xc.s' \
+						LDSCRIPT='demo/stm32f401xc.ld' \
+						DEFINES='STM32F4 STM32F401xC USBD_SOF_DISABLED' \
+						CFLAGS='-mcpu=cortex-m4'						

demo/cdc_startup.c

@@ -113,7 +113,8 @@ static void cdc_init_rcc (void) {
     _BMD(GPIOA->MODER, (0x03 << 22) | (0x03 << 24), (0x02 << 22) | (0x02 << 24)); // MCO
 
 
-#elif defined(STM32F429xx) || defined(STM32F405xx)
+#elif defined(STM32F429xx) || defined(STM32F405xx) \
+    || defined(STM32F401xC) || defined(STM32F401xE)  || defined(STM32F411xE) 
     /* set flash latency 2WS */
     _BMD(FLASH->ACR, FLASH_ACR_LATENCY, FLASH_ACR_LATENCY_2WS);
     /* setting up PLL 16MHz HSI, VCO=144MHz, PLLP = 72MHz PLLQ = 48MHz  */

demo/stm32f401xc.ld

@@ -0,0 +1,8 @@
+ENTRY(Reset_Handler)
+MEMORY
+{
+	ROM    (rx): ORIGIN = 0x08000000, LENGTH = 256K
+	RAM   (rwx): ORIGIN = 0x20000000, LENGTH = 64K
+}
+
+INCLUDE sections.ld

inc/usb.h

@@ -102,7 +102,7 @@
     #endif
     #endif  //__ASSEMBLER__
 
-#elif defined(STM32F411xE)
+#elif defined(STM32F411xE) || defined(STM32F401xC) || defined(STM32F401xE)
 
     #define USBD_STM32F429FS
     #if !defined(__ASSEMBLER__)