Copyright header revised.

setup code moved to cdc_startup.c

demo/cdc_loop.c

@@ -1,8 +1,21 @@
+/* This file is the part of the Lightweight USB device Stack for STM32 microcontrollers
+ *
+ * Copyright ©2016 Dmitry Filimonchuk <dmitrystu[at]gmail[dot]com>
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
 #include <stdint.h>
 #include <stdbool.h>
 #include <string.h>
-#include "macro.h"
-#include "stm32.h"
 #include "usb.h"
 #include "inc/usb_cdc.h"
 
@@ -268,71 +281,6 @@ static void cdc_init_usbd(void) {
     usbd_reg_descr(&udev, cdc_getdesc);
 }
 
-
-static void cdc_init_rcc (void) {
-#if defined(STM32L0)
-    _BST(RCC->APB1ENR, RCC_APB1ENR_PWREN);
-    _BMD(PWR->CR, PWR_CR_VOS, PWR_CR_VOS_0);
-    _WBC(PWR->CSR, PWR_CSR_VOSF);
-    /* set FLASH latency to 1 */
-    _BST(FLASH->ACR, FLASH_ACR_LATENCY);
-    /* set clock at 32MHz PLL 6/3 HSI */
-    _BMD(RCC->CFGR, RCC_CFGR_PLLDIV | RCC_CFGR_PLLMUL | RCC_CFGR_PLLSRC, RCC_CFGR_PLLDIV3 | RCC_CFGR_PLLMUL6);
-    _BST(RCC->CR, RCC_CR_HSION);
-    _WBS(RCC->CR, RCC_CR_HSIRDY);
-    _BST(RCC->CR, RCC_CR_PLLON);
-    _WBS(RCC->CR, RCC_CR_PLLRDY);
-    /* switch clock to PLL */
-    _BMD(RCC->CFGR, RCC_CFGR_SW, RCC_CFGR_SW_PLL);
-    _WVL(RCC->CFGR, RCC_CFGR_SWS, RCC_CFGR_SWS_PLL);
-
-#elif defined(STM32L1)
-    _BST(RCC->APB1ENR, RCC_APB1ENR_PWREN);
-    _BMD(PWR->CR, PWR_CR_VOS, PWR_CR_VOS_0);
-    _WBC(PWR->CSR, PWR_CSR_VOSF);
-    /* set FLASH latency to 1 */
-    _BST(FLASH->ACR, FLASH_ACR_ACC64);
-    _BST(FLASH->ACR, FLASH_ACR_LATENCY);
-    /* set clock at 32 MHz PLL 6/3 HSI */
-    _BMD(RCC->CFGR, RCC_CFGR_PLLDIV | RCC_CFGR_PLLMUL | RCC_CFGR_PLLSRC, RCC_CFGR_PLLDIV3 | RCC_CFGR_PLLMUL6);
-    _BST(RCC->CR, RCC_CR_HSION);
-    _WBS(RCC->CR, RCC_CR_HSIRDY);
-    _BST(RCC->CR, RCC_CR_PLLON);
-    _WBS(RCC->CR, RCC_CR_PLLRDY);
-    /* switch clock to PLL */
-    _BMD(RCC->CFGR, RCC_CFGR_SW, RCC_CFGR_SW_PLL);
-    _WVL(RCC->CFGR, RCC_CFGR_SWS, RCC_CFGR_SWS_PLL);
-
-#elif defined(STM32L4)
-    _BST(RCC->APB1ENR1, RCC_APB1ENR1_PWREN);
-    /* Set power Range 1 */
-    _BMD(PWR->CR1, PWR_CR1_VOS, PWR_CR1_VOS_1);
-    _WBC(PWR->SR2, PWR_SR2_VOSF);
-    /* Adjust Flash latency */
-    _BST(FLASH->ACR, FLASH_ACR_LATENCY);
-    /* set clock 48Mhz MSI */
-    _BMD(RCC->CR, RCC_CR_MSIRANGE, RCC_CR_MSIRANGE_11 | RCC_CR_MSIRGSEL);
-    /* set MSI as 48MHz USB */
-    _BMD(RCC->CCIPR, RCC_CCIPR_CLK48SEL, RCC_CCIPR_CLK48SEL_0 | RCC_CCIPR_CLK48SEL_1);
-    /* enable GPIOA clock */
-    _BST(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN);
-    /* set GP11 and GP12 as USB data pins AF10 */
-    _BST(GPIOA->AFR[1], (0x0A << 12) | (0x0A << 16));
-    _BMD(GPIOA->MODER, (0x03 << 22) | (0x03 << 24), (0x02 << 22) | (0x02 << 24));
-#else
-    #error Not supported
-#endif
-}
-
-
-void __libc_init_array(void) {
-
-}
-
-void SystemInit(void) {
-    cdc_init_rcc();
-}
-
 void main(void) {
     cdc_init_usbd();
     usbd_control(&udev, usbd_cmd_enable);

demo/cdc_startup.c

@@ -0,0 +1,80 @@
+/* This file is the part of the Lightweight USB device Stack for STM32 microcontrollers
+ *
+ * Copyright ©2016 Dmitry Filimonchuk <dmitrystu[at]gmail[dot]com>
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "macro.h"
+#include "stm32.h"
+
+static void cdc_init_rcc (void) {
+#if defined(STM32L0)
+    _BST(RCC->APB1ENR, RCC_APB1ENR_PWREN);
+    _BMD(PWR->CR, PWR_CR_VOS, PWR_CR_VOS_0);
+    _WBC(PWR->CSR, PWR_CSR_VOSF);
+    /* set FLASH latency to 1 */
+    _BST(FLASH->ACR, FLASH_ACR_LATENCY);
+    /* set clock at 32MHz PLL 6/3 HSI */
+    _BMD(RCC->CFGR, RCC_CFGR_PLLDIV | RCC_CFGR_PLLMUL | RCC_CFGR_PLLSRC, RCC_CFGR_PLLDIV3 | RCC_CFGR_PLLMUL6);
+    _BST(RCC->CR, RCC_CR_HSION);
+    _WBS(RCC->CR, RCC_CR_HSIRDY);
+    _BST(RCC->CR, RCC_CR_PLLON);
+    _WBS(RCC->CR, RCC_CR_PLLRDY);
+    /* switch clock to PLL */
+    _BMD(RCC->CFGR, RCC_CFGR_SW, RCC_CFGR_SW_PLL);
+    _WVL(RCC->CFGR, RCC_CFGR_SWS, RCC_CFGR_SWS_PLL);
+
+#elif defined(STM32L1)
+    _BST(RCC->APB1ENR, RCC_APB1ENR_PWREN);
+    _BMD(PWR->CR, PWR_CR_VOS, PWR_CR_VOS_0);
+    _WBC(PWR->CSR, PWR_CSR_VOSF);
+    /* set FLASH latency to 1 */
+    _BST(FLASH->ACR, FLASH_ACR_ACC64);
+    _BST(FLASH->ACR, FLASH_ACR_LATENCY);
+    /* set clock at 32 MHz PLL 6/3 HSI */
+    _BMD(RCC->CFGR, RCC_CFGR_PLLDIV | RCC_CFGR_PLLMUL | RCC_CFGR_PLLSRC, RCC_CFGR_PLLDIV3 | RCC_CFGR_PLLMUL6);
+    _BST(RCC->CR, RCC_CR_HSION);
+    _WBS(RCC->CR, RCC_CR_HSIRDY);
+    _BST(RCC->CR, RCC_CR_PLLON);
+    _WBS(RCC->CR, RCC_CR_PLLRDY);
+    /* switch clock to PLL */
+    _BMD(RCC->CFGR, RCC_CFGR_SW, RCC_CFGR_SW_PLL);
+    _WVL(RCC->CFGR, RCC_CFGR_SWS, RCC_CFGR_SWS_PLL);
+
+#elif defined(STM32L4)
+    _BST(RCC->APB1ENR1, RCC_APB1ENR1_PWREN);
+    /* Set power Range 1 */
+    _BMD(PWR->CR1, PWR_CR1_VOS, PWR_CR1_VOS_0);
+    _WBC(PWR->SR2, PWR_SR2_VOSF);
+    /* Adjust Flash latency */
+    _BMD(FLASH->ACR, FLASH_ACR_LATENCY, FLASH_ACR_LATENCY_2WS);
+    /* set clock 48Mhz MSI */
+    _BMD(RCC->CR, RCC_CR_MSIRANGE, RCC_CR_MSIRANGE_11 | RCC_CR_MSIRGSEL);
+    /* set MSI as 48MHz USB */
+    _BMD(RCC->CCIPR, RCC_CCIPR_CLK48SEL, RCC_CCIPR_CLK48SEL_0 | RCC_CCIPR_CLK48SEL_1);
+    /* enable GPIOA clock */
+    _BST(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN);
+    /* set GP11 and GP12 as USB data pins AF10 */
+    _BST(GPIOA->AFR[1], (0x0A << 12) | (0x0A << 16));
+    _BMD(GPIOA->MODER, (0x03 << 22) | (0x03 << 24), (0x02 << 22) | (0x02 << 24));
+#else
+    #error Not supported
+#endif
+}
+
+void __libc_init_array(void) {
+
+}
+
+void SystemInit(void) {
+    cdc_init_rcc();
+}

src/memmap.inc

@@ -1,4 +1,4 @@
-/* This file is the part of the LUS32 project
+/* This file is the part of the Lightweight USB device Stack for STM32 microcontrollers
  *
  * Copyright ©2016 Dmitry Filimonchuk <dmitrystu[at]gmail[dot]com>
  *

src/usb_32v0.c

@@ -1,3 +1,18 @@
+/* This file is the part of the Lightweight USB device Stack for STM32 microcontrollers
+ *
+ * Copyright ©2016 Dmitry Filimonchuk <dmitrystu[at]gmail[dot]com>
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
 #include <stdint.h>
 #include <stdbool.h>
 #include "stm32.h"

src/usb_32v0A.S

@@ -1,4 +1,4 @@
-/* This file is the part of the LUS32 project
+/* This file is the part of the Lightweight USB device Stack for STM32 microcontrollers
  *
  * Copyright ©2016 Dmitry Filimonchuk <dmitrystu[at]gmail[dot]com>
  *
@@ -17,11 +17,10 @@
     #define __ASSEMBLER__
 #endif
 
-#if defined(USE_STMV0_DRIVER)
 #include "../usb.h"
+#if defined(USE_STMV0_DRIVER)
 #include "memmap.inc"
 
-
 #define EP_SETUP    0x0800
 #define EP_TYPE     0x0600
 #define EP_KIND     0x0100

src/usb_32v1.c

@@ -1,3 +1,18 @@
+/* This file is the part of the Lightweight USB device Stack for STM32 microcontrollers
+ *
+ * Copyright ©2016 Dmitry Filimonchuk <dmitrystu[at]gmail[dot]com>
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
 #include <stdint.h>
 #include <stdbool.h>
 #include "stm32.h"

src/usb_32v1A.S

@@ -1,4 +1,4 @@
-/* This file is the part of the LUS32 project
+/* This file is the part of the Lightweight USB device Stack for STM32 microcontrollers
  *
  * Copyright ©2016 Dmitry Filimonchuk <dmitrystu[at]gmail[dot]com>
  *
@@ -17,12 +17,10 @@
     #define __ASSEMBLER__
 #endif
 
-#if defined(USE_STMV1_DRIVER)
 #include "../usb.h"
+#if defined(USE_STMV1_DRIVER)
 #include "memmap.inc"
 
-
-
 #define EP_SETUP    0x0800
 #define EP_TYPE     0x0600
 #define EP_KIND     0x0100

src/usb_32v2.c

@@ -1,3 +1,18 @@
+/* This file is the part of the Lightweight USB device Stack for STM32 microcontrollers
+ *
+ * Copyright ©2016 Dmitry Filimonchuk <dmitrystu[at]gmail[dot]com>
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
 #include <stdint.h>
 #include <stdbool.h>
 #include "macro.h"

src/usbd_core.c

@@ -1,4 +1,4 @@
-/* This file is the part of the LUS32 project
+/* This file is the part of the Lightweight USB device Stack for STM32 microcontrollers
  *
  * Copyright ©2016 Dmitry Filimonchuk <dmitrystu[at]gmail[dot]com>
  *

usb.h

@@ -1,4 +1,4 @@
-/* This file is the part of the LUS32 project
+/* This file is the part of the Lightweight USB device Stack for STM32 microcontrollers
  *
  * Copyright ©2016 Dmitry Filimonchuk <dmitrystu[at]gmail[dot]com>
  *
@@ -13,7 +13,6 @@
  * limitations under the License.
  */
 
-
 #ifndef _USB_H_
 #define _USB_H_
 #if defined(__cplusplus)