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@@ -13,24 +13,55 @@
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### Supported hardware ###
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-| HW driver | Written on | Endpoints | Features | MCU series |
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-|------------|------------|-----------|------------------------------|------------|
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-| usb_stmv0 | GCC C | 8 | Internal S/N, Doublebuffered, BC1.2 | STM32L0x2 STM32L0x3 STM32L4x2 STM32L4x3 STM32F0x2 STM32F0x8 |
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-| usb_stmv0a | GCC ASM | 8 | Internal S/N, Doublebuffered, BC1.2 | STM32L0x2 STM32L0x3 STM32L4x2 STM32L4x3 STM32F0x2 STM32F0x8 |
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-| usb_stmv1 | GCC C | 8 | Internal S/N, Doublebuffered | STM32L1xx |
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-| usb_stmv1a | GCC ASM | 8 | Internal S/N, Doublebuffered | STM32L1xx |
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-| usb_stmv2 | GCC C | 6 | Internal S/N, Doublebuffered, BC1.2 | STM32L4x5 STM32L4x6 (OTG FS Device mode) |
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-| usb_stmv3 | GCC C | 8 | Internal S/N, Doublebuffered, optional DP control | STM32F102 STM32F103 STM32F3xx |
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-| usb_stmv3a | GCC ASM | 8 | Internal S/N, Doublebuffered, optional DP control | STM32F102 STM32F103 STM32F3xx |
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+<table>
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+ <tr><th>MCU Series</th><th>Features</th><th>Driver</th><th>File</th></tr>
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+ <tr>
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+ <td rowspan="2">STM32L0x2 STM32L0x3 STM32L4x2 STM32L4x3 STM32F0x2 STM32F0x8</td>
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+ <td nowrap rowspan="2">Doublebuffered<br />8 endpoints<br /> BC1.2</td>
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+ <td>usbd_devfs</td>
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+ <td>usbd_stm32l052_devfs.c</td>
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+ </tr>
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+ <tr>
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+ <td>usbd_devfs_asm</td>
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+ <td>usbd_stm32l052_devfs_asm.S</td>
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+ </tr>
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+ <tr>
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+ <td rowspan="2">STM32L1xx</td>
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+ <td nowrap rowspan="2">Doublebuffered<br />8 endpoints</td>
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+ <td>usbd_devfs</td>
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+ <td>usbd_stm32l100_devfs.c</td>
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+ </tr>
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+ <tr>
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+ <td>usbd_devfs_asm</td>
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+ <td>usbd_stm32l100_devfs_asm.S</td>
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+ </tr>
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+ <tr>
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+ <td rowspan="2">STM32F102 STM32F103 STM32F302 STM32F303 STM32F373</td>
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+ <td nowrap rowspan="2">Doublebuffered<br />External DP pullup<br />8 endpoints</td>
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+ <td>usbd_devfs</td>
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+ <td>usbd_stm32f103_devfs.c</td>
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+ </tr>
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+ <tr>
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+ <td>usbd_devfs_asm</td>
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+ <td>usbd_stm32f103_devfs_asm.S</td>
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+ </tr>
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+ <tr>
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+ <td>STM32L4x5 STM32L4x6</td>
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+ <td nowrap>Doublebuffered<br />6 endpoints<br /> BC1.2<br />VBUS detection</td>
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+ <td>usbd_otgfs</td>
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+ <td>usbd_stm32l476_otgfs.c</td>
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+ </tr>
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+
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+</table>
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1. Single physical endpoint can be used to implement
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+ one bi-directional/single-buffer logical endpoint (CONTROL)
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- + one mono-directional/double-buffer logical endpoint (BULK OR ISOCHRONOUS)
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- + two mono-directional/single-buffer logical endpoints (BULK OR INTERRUPT)
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+ + one uni-directional/double-buffer logical endpoint (BULK OR ISOCHRONOUS)
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+ + two -directional/single-buffer logical endpoints (BULK OR INTERRUPT)
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2. At this moment BULK IN endpoint can use both buffers, but it is not **real** doublebuffered.
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-3. Tested with STM32L052, STM31L100, STM32L476RG, STM32F103CB, STM32F303CC, STM32F303RE
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+3. Tested with STM32L052K8, STM31L100RC, STM32L476RG, STM32F103C8, STM32F103CB, STM32F303CC, STM32F303RE
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### Implemented definitions for classes ###
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1. USB HID based on [Device Class Definition for Human Interface Devices (HID) Version 1.11](http://www.usb.org/developers/hidpage/HID1_11.pdf)
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