usbd_stm32l100_devfs.c 14 KB

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  1. /* This file is the part of the Lightweight USB device Stack for STM32 microcontrollers
  2. *
  3. * Copyright ©2016 Dmitry Filimonchuk <dmitrystu[at]gmail[dot]com>
  4. *
  5. * Licensed under the Apache License, Version 2.0 (the "License");
  6. * you may not use this file except in compliance with the License.
  7. * You may obtain a copy of the License at
  8. * http://www.apache.org/licenses/LICENSE-2.0
  9. * Unless required by applicable law or agreed to in writing, software
  10. * distributed under the License is distributed on an "AS IS" BASIS,
  11. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. * See the License for the specific language governing permissions and
  13. * limitations under the License.
  14. */
  15. #include <stdint.h>
  16. #include <stdbool.h>
  17. #include "stm32.h"
  18. #include "usb.h"
  19. #if defined(USBD_STM32L100)
  20. #ifndef USB_PMASIZE
  21. #pragma message "PMA memory size is not defined. Use 512 bytes by default"
  22. #define USB_PMASIZE 0x200
  23. #endif
  24. #define USB_EP_SWBUF_TX USB_EP_DTOG_RX
  25. #define USB_EP_SWBUF_RX USB_EP_DTOG_TX
  26. #define EP_TOGGLE_SET(epr, bits, mask) *(epr) = (*(epr) ^ (bits)) & (USB_EPREG_MASK | (mask))
  27. #define EP_TX_STALL(epr) EP_TOGGLE_SET((epr), USB_EP_TX_STALL, USB_EPTX_STAT)
  28. #define EP_RX_STALL(epr) EP_TOGGLE_SET((epr), USB_EP_RX_STALL, USB_EPRX_STAT)
  29. #define EP_TX_UNSTALL(epr) EP_TOGGLE_SET((epr), USB_EP_TX_NAK, USB_EPTX_STAT | USB_EP_DTOG_TX)
  30. #define EP_RX_UNSTALL(epr) EP_TOGGLE_SET((epr), USB_EP_RX_VALID, USB_EPRX_STAT | USB_EP_DTOG_RX)
  31. #define EP_DTX_UNSTALL(epr) EP_TOGGLE_SET((epr), USB_EP_TX_VALID, USB_EPTX_STAT | USB_EP_DTOG_TX | USB_EP_SWBUF_TX)
  32. #define EP_DRX_UNSTALL(epr) EP_TOGGLE_SET((epr), USB_EP_RX_VALID | USB_EP_SWBUF_RX, USB_EPRX_STAT | USB_EP_DTOG_RX | USB_EP_SWBUF_RX)
  33. #define EP_TX_VALID(epr) EP_TOGGLE_SET((epr), USB_EP_TX_VALID, USB_EPTX_STAT)
  34. #define EP_RX_VALID(epr) EP_TOGGLE_SET((epr), USB_EP_RX_VALID, USB_EPRX_STAT)
  35. #define STATUS_VAL(x) (x)
  36. typedef struct {
  37. uint16_t addr;
  38. uint16_t :16;
  39. uint16_t cnt;
  40. uint16_t :16;
  41. } pma_rec;
  42. typedef union pma_table {
  43. struct {
  44. pma_rec tx;
  45. pma_rec rx;
  46. };
  47. struct {
  48. pma_rec tx0;
  49. pma_rec tx1;
  50. };
  51. struct {
  52. pma_rec rx0;
  53. pma_rec rx1;
  54. };
  55. } pma_table;
  56. /** \brief Helper function. Returns pointer to the buffer descriptor table.
  57. */
  58. inline static pma_table *EPT(uint8_t ep) {
  59. return (pma_table*)((ep & 0x07) * 16 + USB_PMAADDR);
  60. }
  61. /** \brief Helper function. Returns pointer to the endpoint control register.
  62. */
  63. inline static volatile uint16_t *EPR(uint8_t ep) {
  64. return (uint16_t*)((ep & 0x07) * 4 + USB_BASE);
  65. }
  66. /** \brief Helper function. Returns next available PMA buffer.
  67. *
  68. * \param sz uint16_t Requested buffer size.
  69. * \return uint16_t Buffer address for PMA table.
  70. * \note PMA buffers grown from top to bottom like stack.
  71. */
  72. static uint16_t get_next_pma(uint16_t sz) {
  73. unsigned _result = USB_PMASIZE;
  74. for (int i = 0; i < 8; i++) {
  75. pma_table *tbl = EPT(i);
  76. if ((tbl->tx.addr) && (tbl->tx.addr < _result)) _result = tbl->tx.addr;
  77. if ((tbl->rx.addr) && (tbl->rx.addr < _result)) _result = tbl->rx.addr;
  78. }
  79. return (_result < (0x020 + sz)) ? 0 : (_result - sz);
  80. }
  81. uint32_t getinfo(void) {
  82. if (!(RCC->APB1ENR & RCC_APB1ENR_USBEN)) return STATUS_VAL(0);
  83. if (SYSCFG->PMC & SYSCFG_PMC_USB_PU) return STATUS_VAL(USBD_HW_ENABLED | USBD_HW_SPEED_FS);
  84. return STATUS_VAL(USBD_HW_ENABLED);
  85. }
  86. void ep_setstall(uint8_t ep, bool stall) {
  87. volatile uint16_t *reg = EPR(ep);
  88. /* ISOCHRONOUS endpoint can't be stalled or unstalled */
  89. if (USB_EP_ISOCHRONOUS == (*reg & USB_EP_T_FIELD)) return;
  90. /* If it's an IN endpoint */
  91. if (ep & 0x80) {
  92. /* DISABLED endpoint can't be stalled or unstalled */
  93. if (USB_EP_TX_DIS == (*reg & USB_EPTX_STAT)) return;
  94. if (stall) {
  95. EP_TX_STALL(reg);
  96. } else {
  97. /* if it's a doublebuffered endpoint */
  98. if ((USB_EP_KIND | USB_EP_BULK) == (*reg & (USB_EP_T_FIELD | USB_EP_KIND))) {
  99. /* set endpoint to VALID and clear DTOG_TX & SWBUF_TX */
  100. EP_DTX_UNSTALL(reg);
  101. } else {
  102. /* set endpoint to NAKED and clear DTOG_TX */
  103. EP_TX_UNSTALL(reg);
  104. }
  105. }
  106. } else {
  107. if (USB_EP_RX_DIS == (*reg & USB_EPRX_STAT)) return;
  108. if (stall) {
  109. EP_RX_STALL(reg);
  110. } else {
  111. /* if it's a doublebuffered endpoint */
  112. if ((USB_EP_KIND | USB_EP_BULK) == (*reg & (USB_EP_T_FIELD | USB_EP_KIND))) {
  113. /* set endpoint to VALID, clear DTOG_RX, set SWBUF_RX */
  114. EP_DRX_UNSTALL(reg);
  115. } else {
  116. /* set endpoint to VALID and clear DTOG_RX */
  117. EP_RX_UNSTALL(reg);
  118. }
  119. }
  120. }
  121. }
  122. bool ep_isstalled(uint8_t ep) {
  123. if (ep & 0x80) {
  124. return (USB_EP_TX_STALL == (USB_EPTX_STAT & *EPR(ep)));
  125. } else {
  126. return (USB_EP_RX_STALL == (USB_EPRX_STAT & *EPR(ep)));
  127. }
  128. }
  129. void enable(bool enable) {
  130. if (enable) {
  131. RCC->APB1ENR |= RCC_APB1ENR_USBEN;
  132. RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;
  133. RCC->APB1RSTR |= RCC_APB1RSTR_USBRST;
  134. RCC->APB1RSTR &= ~RCC_APB1RSTR_USBRST;
  135. USB->CNTR = USB_CNTR_CTRM | USB_CNTR_RESETM | USB_CNTR_ERRM |
  136. #if !defined(USBD_SOF_DISABLED)
  137. USB_CNTR_SOFM |
  138. #endif
  139. USB_CNTR_SUSPM | USB_CNTR_WKUPM;
  140. } else if (RCC->APB1ENR & RCC_APB1ENR_USBEN) {
  141. SYSCFG->PMC &= ~SYSCFG_PMC_USB_PU;
  142. RCC->APB1RSTR |= RCC_APB1RSTR_USBRST;
  143. RCC->APB1ENR &= ~RCC_APB1ENR_USBEN;
  144. }
  145. }
  146. uint8_t connect(bool connect) {
  147. if (connect) {
  148. SYSCFG->PMC |= SYSCFG_PMC_USB_PU;
  149. } else {
  150. SYSCFG->PMC &= ~SYSCFG_PMC_USB_PU;
  151. }
  152. return usbd_lane_unk;
  153. }
  154. void setaddr (uint8_t addr) {
  155. USB->DADDR = USB_DADDR_EF | addr;
  156. }
  157. bool ep_config(uint8_t ep, uint8_t eptype, uint16_t epsize) {
  158. volatile uint16_t *reg = EPR(ep);
  159. pma_table *tbl = EPT(ep);
  160. /* epsize should be 16-bit aligned */
  161. if (epsize & 0x01) epsize++;
  162. switch (eptype) {
  163. case USB_EPTYPE_CONTROL:
  164. *reg = USB_EP_CONTROL | (ep & 0x07);
  165. break;
  166. case USB_EPTYPE_ISOCHRONUS:
  167. *reg = USB_EP_ISOCHRONOUS | (ep & 0x07);
  168. break;
  169. case USB_EPTYPE_BULK:
  170. *reg = USB_EP_BULK | (ep & 0x07);
  171. break;
  172. case USB_EPTYPE_BULK | USB_EPTYPE_DBLBUF:
  173. *reg = USB_EP_BULK | USB_EP_KIND | (ep & 0x07);
  174. break;
  175. default:
  176. *reg = USB_EP_INTERRUPT | (ep & 0x07);
  177. break;
  178. }
  179. /* if it TX or CONTROL endpoint */
  180. if ((ep & 0x80) || (eptype == USB_EPTYPE_CONTROL)) {
  181. uint16_t _pma;
  182. _pma = get_next_pma(epsize);
  183. if (_pma == 0) return false;
  184. tbl->tx.addr = _pma;
  185. tbl->tx.cnt = 0;
  186. if ((eptype == USB_EPTYPE_ISOCHRONUS) ||
  187. (eptype == (USB_EPTYPE_BULK | USB_EPTYPE_DBLBUF))) {
  188. _pma = get_next_pma(epsize);
  189. if (_pma == 0) return false;
  190. tbl->tx1.addr = _pma;
  191. tbl->tx1.cnt = 0;
  192. EP_DTX_UNSTALL(reg);
  193. } else {
  194. EP_TX_UNSTALL(reg);
  195. }
  196. }
  197. if (!(ep & 0x80)) {
  198. uint16_t _rxcnt;
  199. uint16_t _pma;
  200. if (epsize > 62) {
  201. if (epsize & 0x1F) {
  202. epsize &= ~0x1F;
  203. epsize += 0x20;
  204. }
  205. _rxcnt = 0x8000 - 0x20 + (epsize << 5);
  206. } else {
  207. _rxcnt = epsize << 9;
  208. }
  209. _pma = get_next_pma(epsize);
  210. if (_pma == 0) return false;
  211. tbl->rx.addr = _pma;
  212. tbl->rx.cnt = _rxcnt;
  213. if ((eptype == USB_EPTYPE_ISOCHRONUS) ||
  214. (eptype == (USB_EPTYPE_BULK | USB_EPTYPE_DBLBUF))) {
  215. _pma = get_next_pma(epsize);
  216. if (_pma == 0) return false;
  217. tbl->rx0.addr = _pma;
  218. tbl->rx0.cnt = _rxcnt;
  219. EP_DRX_UNSTALL(reg);
  220. } else {
  221. EP_RX_UNSTALL(reg);
  222. }
  223. }
  224. return true;
  225. }
  226. void ep_deconfig(uint8_t ep) {
  227. pma_table *ept = EPT(ep);
  228. *EPR(ep) &= ~USB_EPREG_MASK;
  229. ept->rx.addr = 0;
  230. ept->rx.cnt = 0;
  231. ept->tx.addr = 0;
  232. ept->tx.cnt = 0;
  233. }
  234. static uint16_t pma_read (uint8_t *buf, uint16_t blen, pma_rec *rx) {
  235. uint16_t *pma = (void*)(USB_PMAADDR + 2 * rx->addr);
  236. uint16_t rxcnt = rx->cnt & 0x03FF;
  237. rx->cnt &= ~0x3FF;
  238. if (blen > rxcnt) {
  239. blen = rxcnt;
  240. }
  241. rxcnt = blen;
  242. while (blen) {
  243. uint16_t _t = *pma;
  244. *buf++ = _t & 0xFF;
  245. if (--blen) {
  246. *buf++ = _t >> 8;
  247. pma += 2;
  248. blen--;
  249. } else break;
  250. }
  251. return rxcnt;
  252. }
  253. int32_t ep_read(uint8_t ep, void *buf, uint16_t blen) {
  254. pma_table *tbl = EPT(ep);
  255. volatile uint16_t *reg = EPR(ep);
  256. switch (*reg & (USB_EPRX_STAT | USB_EP_T_FIELD | USB_EP_KIND)) {
  257. /* doublebuffered bulk endpoint */
  258. case (USB_EP_RX_VALID | USB_EP_BULK | USB_EP_KIND):
  259. /* switching SWBUF if EP is NAKED */
  260. switch (*reg & (USB_EP_DTOG_RX | USB_EP_SWBUF_RX)) {
  261. case 0:
  262. case (USB_EP_DTOG_RX | USB_EP_SWBUF_RX):
  263. *reg = (*reg & USB_EPREG_MASK) | USB_EP_SWBUF_RX;
  264. break;
  265. default:
  266. break;
  267. }
  268. if (*reg & USB_EP_SWBUF_RX) {
  269. return pma_read(buf, blen, &(tbl->rx1));
  270. } else {
  271. return pma_read(buf, blen, &(tbl->rx0));
  272. }
  273. /* isochronous endpoint */
  274. case (USB_EP_RX_VALID | USB_EP_ISOCHRONOUS):
  275. if (*reg & USB_EP_DTOG_RX) {
  276. return pma_read(buf, blen, &(tbl->rx1));
  277. } else {
  278. return pma_read(buf, blen, &(tbl->rx0));
  279. }
  280. /* regular endpoint */
  281. case (USB_EP_RX_NAK | USB_EP_BULK):
  282. case (USB_EP_RX_NAK | USB_EP_CONTROL):
  283. case (USB_EP_RX_NAK | USB_EP_INTERRUPT):
  284. {
  285. int32_t res = pma_read(buf, blen, &(tbl->rx));
  286. /* setting endpoint to VALID state */
  287. EP_RX_VALID(reg);
  288. return res;
  289. }
  290. /* invalid or not ready */
  291. default:
  292. return -1;
  293. }
  294. }
  295. static void pma_write(const uint8_t *buf, uint16_t blen, pma_rec *tx) {
  296. uint16_t *pma = (void*)(USB_PMAADDR + 2 * (tx->addr));
  297. tx->cnt = blen;
  298. while (blen > 1) {
  299. *pma = buf[1] << 8 | buf[0];
  300. pma += 2;
  301. buf += 2;
  302. blen -= 2;
  303. }
  304. if (blen) *pma = *buf;
  305. }
  306. int32_t ep_write(uint8_t ep, void *buf, uint16_t blen) {
  307. pma_table *tbl = EPT(ep);
  308. volatile uint16_t *reg = EPR(ep);
  309. switch (*reg & (USB_EPTX_STAT | USB_EP_T_FIELD | USB_EP_KIND)) {
  310. /* doublebuffered bulk endpoint */
  311. case (USB_EP_TX_NAK | USB_EP_BULK | USB_EP_KIND):
  312. if (*reg & USB_EP_SWBUF_TX) {
  313. pma_write(buf, blen, &(tbl->tx1));
  314. } else {
  315. pma_write(buf, blen, &(tbl->tx0));
  316. }
  317. *reg = (*reg & USB_EPREG_MASK) | USB_EP_SWBUF_TX;
  318. break;
  319. /* isochronous endpoint */
  320. case (USB_EP_TX_VALID | USB_EP_ISOCHRONOUS):
  321. if (!(*reg & USB_EP_DTOG_TX)) {
  322. pma_write(buf, blen, &(tbl->tx1));
  323. } else {
  324. pma_write(buf, blen, &(tbl->tx0));
  325. }
  326. break;
  327. /* regular endpoint */
  328. case (USB_EP_TX_NAK | USB_EP_BULK):
  329. case (USB_EP_TX_NAK | USB_EP_CONTROL):
  330. case (USB_EP_TX_NAK | USB_EP_INTERRUPT):
  331. pma_write(buf, blen, &(tbl->tx));
  332. EP_TX_VALID(reg);
  333. break;
  334. /* invalid or not ready */
  335. default:
  336. return -1;
  337. }
  338. return blen;
  339. }
  340. uint16_t get_frame (void) {
  341. return USB->FNR & USB_FNR_FN;
  342. }
  343. void evt_poll(usbd_device *dev, usbd_evt_callback callback) {
  344. uint8_t _ev, _ep;
  345. uint16_t _istr = USB->ISTR;
  346. _ep = _istr & USB_ISTR_EP_ID;
  347. if (_istr & USB_ISTR_CTR) {
  348. volatile uint16_t *reg = EPR(_ep);
  349. if (*reg & USB_EP_CTR_TX) {
  350. *reg &= (USB_EPREG_MASK ^ USB_EP_CTR_TX);
  351. _ep |= 0x80;
  352. _ev = usbd_evt_eptx;
  353. } else {
  354. *reg &= (USB_EPREG_MASK ^ USB_EP_CTR_RX);
  355. _ev = (*reg & USB_EP_SETUP) ? usbd_evt_epsetup : usbd_evt_eprx;
  356. }
  357. } else if (_istr & USB_ISTR_RESET) {
  358. USB->ISTR &= ~USB_ISTR_RESET;
  359. USB->BTABLE = 0;
  360. for (int i = 0; i < 8; i++) {
  361. ep_deconfig(i);
  362. }
  363. _ev = usbd_evt_reset;
  364. #if !defined(USBD_SOF_DISABLED)
  365. } else if (_istr & USB_ISTR_SOF) {
  366. _ev = usbd_evt_sof;
  367. USB->ISTR &= ~USB_ISTR_SOF;
  368. #endif
  369. } else if (_istr & USB_ISTR_WKUP) {
  370. _ev = usbd_evt_wkup;
  371. USB->CNTR &= ~USB_CNTR_FSUSP;
  372. USB->ISTR &= ~USB_ISTR_WKUP;
  373. } else if (_istr & USB_ISTR_SUSP) {
  374. _ev = usbd_evt_susp;
  375. USB->CNTR |= USB_CNTR_FSUSP;
  376. USB->ISTR &= ~USB_ISTR_SUSP;
  377. } else if (_istr & USB_ISTR_ERR) {
  378. USB->ISTR &= ~USB_ISTR_ERR;
  379. _ev = usbd_evt_error;
  380. } else {
  381. return;
  382. }
  383. callback(dev, _ev, _ep);
  384. }
  385. static uint32_t fnv1a32_turn (uint32_t fnv, uint32_t data ) {
  386. for (int i = 0; i < 4 ; i++) {
  387. fnv ^= (data & 0xFF);
  388. fnv *= 16777619;
  389. data >>= 8;
  390. }
  391. return fnv;
  392. }
  393. uint16_t get_serialno_desc(void *buffer) {
  394. struct usb_string_descriptor *dsc = buffer;
  395. uint16_t *str = dsc->wString;
  396. uint32_t fnv = 2166136261;
  397. fnv = fnv1a32_turn(fnv, *(uint32_t*)(UID_BASE + 0x00));
  398. fnv = fnv1a32_turn(fnv, *(uint32_t*)(UID_BASE + 0x04));
  399. fnv = fnv1a32_turn(fnv, *(uint32_t*)(UID_BASE + 0x14));
  400. for (int i = 28; i >= 0; i -= 4 ) {
  401. uint16_t c = (fnv >> i) & 0x0F;
  402. c += (c < 10) ? '0' : ('A' - 10);
  403. *str++ = c;
  404. }
  405. dsc->bDescriptorType = USB_DTYPE_STRING;
  406. dsc->bLength = 18;
  407. return 18;
  408. }
  409. __attribute__((externally_visible)) const struct usbd_driver usbd_devfs = {
  410. getinfo,
  411. enable,
  412. connect,
  413. setaddr,
  414. ep_config,
  415. ep_deconfig,
  416. ep_read,
  417. ep_write,
  418. ep_setstall,
  419. ep_isstalled,
  420. evt_poll,
  421. get_frame,
  422. get_serialno_desc,
  423. };
  424. #endif //USBD_STM32L100