memmap.inc 5.6 KB

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  1. /* This file is the part of the Lightweight USB device Stack for STM32 microcontrollers
  2. *
  3. * Copyright ©2016 Dmitry Filimonchuk <dmitrystu[at]gmail[dot]com>
  4. *
  5. * Licensed under the Apache License, Version 2.0 (the "License");
  6. * you may not use this file except in compliance with the License.
  7. * You may obtain a copy of the License at
  8. * http://www.apache.org/licenses/LICENSE-2.0
  9. * Unless required by applicable law or agreed to in writing, software
  10. * distributed under the License is distributed on an "AS IS" BASIS,
  11. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. * See the License for the specific language governing permissions and
  13. * limitations under the License.
  14. */
  15. #if defined(STM32L052xx) || defined(STM32L053xx) || \
  16. defined(STM32L062xx) || defined(STM32L063xx) || \
  17. defined(STM32L072xx) || defined(STM32L073xx) || \
  18. defined(STM32L082xx) || defined(STM32L083xx) || \
  19. defined(STM32F042x6) || defined(STM32F048xx) || \
  20. defined(STM32F070x6) || defined(STM32F070xB) || \
  21. defined(STM32F072xB) || defined(STM32F078xx) \
  22. #define USB_EPBASE 0x40005C00
  23. #define USB_REGBASE 0x40005C40
  24. #define USB_CNTR 0x00
  25. #define USB_ISTR 0x04
  26. #define USB_FNR 0x08
  27. #define USB_DADDR 0x0C
  28. #define USB_BTABLE 0x10
  29. #define USB_BCDR 0x18
  30. #define USB_PMABASE 0x40006000
  31. #define RCC_BASE 0x40021000
  32. #define RCC_USBEN 23
  33. #if defined(STM32F042x6) || defined(STM32F048xx) || \
  34. defined(STM32F070x6) || defined(STM32F070xB) || \
  35. defined(STM32F072xB) || defined(STM32F078xx)
  36. #define RCC_APB1RSTR 0x10
  37. #define RCC_APB1ENR 0x1C
  38. #define UID_BASE 0x1FFFF7AC
  39. #else
  40. #define RCC_APB1RSTR 0x28
  41. #define RCC_APB1ENR 0x38
  42. #define UID_BASE 0x1FF80050
  43. #endif
  44. #elif defined(STM32L432xx) || defined(STM32L433xx) || \
  45. defined(STM32L442xx) || defined(STM32L443xx) || \
  46. defined(STM32L452xx) || defined(STM32L462xx)
  47. #define USB_EPBASE 0x40006800
  48. #define USB_REGBASE 0x40006840
  49. #define USB_CNTR 0x00
  50. #define USB_ISTR 0x04
  51. #define USB_FNR 0x08
  52. #define USB_DADDR 0x0C
  53. #define USB_BTABLE 0x10
  54. #define USB_BCDR 0x18
  55. #define USB_PMABASE 0x40006C00
  56. #define RCC_BASE 0x40021000
  57. #define RCC_APB1RSTR 0x38
  58. #define RCC_APB1ENR 0x58
  59. #define UID_BASE 0x1FFF7590
  60. #define RCC_USBEN 26
  61. #elif defined(STM32L1)
  62. /* common definitions for STM31L100xx STM32L151xx STM32L152xx STM32L162xx */
  63. #define USB_EPBASE 0x40005C00
  64. #define USB_REGBASE 0x40005C40
  65. #define USB_CNTR 0x00
  66. #define USB_ISTR 0x04
  67. #define USB_FNR 0x08
  68. #define USB_DADDR 0x0C
  69. #define USB_BTABLE 0x10
  70. #define USB_PMABASE 0x40006000
  71. #define SYSCFG_BASE 0x40010000
  72. #define SYSCFG_PMC 0x04
  73. #define RCC_BASE 0x40023800
  74. #define RCC_APB1ENR 0x24
  75. #define RCC_APB1RSTR 0x18
  76. #define RCC_APB2ENR 0x20
  77. #if defined(STM32L100xB) || defined(STM32L100xBA) || \
  78. defined(STM32L151xB) || defined(STM32L151xBA)
  79. /* Cat.1 and Cat.2 devices */
  80. #define UID_BASE 0x1FF80050
  81. #else
  82. #define UID_BASE 0x1FF800D0
  83. #endif
  84. #elif defined(STM32F102x6) || defined(STM32F102xB) || \
  85. defined(STM32F103x6) || defined(STM32F103xB) || \
  86. defined(STM32F103xE) || defined(STM32F103xG)
  87. #define USB_EPBASE 0x40005C00
  88. #define USB_REGBASE 0x40005C40
  89. #define USB_CNTR 0x00
  90. #define USB_ISTR 0x04
  91. #define USB_FNR 0x08
  92. #define USB_DADDR 0x0C
  93. #define USB_BTABLE 0x10
  94. #define USB_PMABASE 0x40006000
  95. #define RCC_BASE 0x40021000
  96. #define RCC_APB1RSTR 0x10
  97. #define RCC_APB2ENR 0x18
  98. #define RCC_APB1ENR 0x1C
  99. #define RCC_GPIOAEN 0x02
  100. #define RCC_GPIOBEN 0x03
  101. #define RCC_GPIOCEN 0x04
  102. #define RCC_GPIODEN 0x05
  103. #define RCC_GPIOEEN 0x06
  104. #define RCC_GPIOFEN 0x07
  105. #define UID_BASE 0x1FFFF7E8
  106. #define GPIOA 0x40010800
  107. #define GPIOB 0x40010C00
  108. #define GPIOC 0x40011000
  109. #define GPIOD 0x40011400
  110. #define GPIOE 0x40011800
  111. #define GPIOF 0x40011C00
  112. #define GPIOG 0x40012000
  113. #define GPIO_CRL 0x00
  114. #define GPIO_CRH 0x04
  115. #define GPIO_IDR 0x08
  116. #define GPIO_BSRR 0x10
  117. #elif defined(STM32F303x8) || defined(STM32F303xC) || \
  118. defined(STM32F303xE)
  119. #define USB_EPBASE 0x40005C00
  120. #define USB_REGBASE 0x40005C40
  121. #define USB_CNTR 0x00
  122. #define USB_ISTR 0x04
  123. #define USB_FNR 0x08
  124. #define USB_DADDR 0x0C
  125. #define USB_BTABLE 0x10
  126. #define USB_PMABASE 0x40006000
  127. #define RCC_BASE 0x40021000
  128. #define RCC_APB1ENR 0x1C
  129. #define RCC_APB1RSTR 0x10
  130. #define RCC_AHBENR 0x14
  131. #define RCC_GPIOAEN 0x11
  132. #define RCC_GPIOBEN 0x12
  133. #define RCC_GPIOCEN 0x13
  134. #define RCC_GPIODEN 0x14
  135. #define RCC_GPIOEEN 0x15
  136. #define RCC_GPIOFEN 0x16
  137. #define RCC_GPIOGEN 0x17
  138. #define RCC_GPIOHEN 0x10
  139. #define UID_BASE 0x1FFFF7AC
  140. #define GPIOA 0x48000000
  141. #define GPIOB 0x48000400
  142. #define GPIOC 0x48000800
  143. #define GPIOD 0x48000C00
  144. #define GPIOE 0x48001000
  145. #define GPIOF 0x48001400
  146. #define GPIO_MODER 0x00
  147. #define GPIO_BSRR 0x18
  148. #else
  149. #error Unsupported MCU
  150. #endif