usb_32v1.c 14 KB

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  1. /* This file is the part of the Lightweight USB device Stack for STM32 microcontrollers
  2. *
  3. * Copyright ©2016 Dmitry Filimonchuk <dmitrystu[at]gmail[dot]com>
  4. *
  5. * Licensed under the Apache License, Version 2.0 (the "License");
  6. * you may not use this file except in compliance with the License.
  7. * You may obtain a copy of the License at
  8. * http://www.apache.org/licenses/LICENSE-2.0
  9. * Unless required by applicable law or agreed to in writing, software
  10. * distributed under the License is distributed on an "AS IS" BASIS,
  11. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. * See the License for the specific language governing permissions and
  13. * limitations under the License.
  14. */
  15. #include <stdint.h>
  16. #include <stdbool.h>
  17. #include "stm32.h"
  18. #include "../usb.h"
  19. #if defined(USE_STMV1_DRIVER)
  20. #ifndef USB_PMASIZE
  21. #warning PMA memory size is not defined. Use 512 bytes by default
  22. #define USB_PMASIZE 0x200
  23. #endif
  24. #define USB_EP_SWBUF_TX USB_EP_DTOG_RX
  25. #define USB_EP_SWBUF_RX USB_EP_DTOG_TX
  26. #define EP_TOGGLE_SET(epr, bits, mask) *(epr) = (*(epr) ^ (bits)) & (USB_EPREG_MASK | (mask))
  27. #define EP_TX_STALL(epr) EP_TOGGLE_SET((epr), USB_EP_TX_STALL, USB_EPTX_STAT)
  28. #define EP_RX_STALL(epr) EP_TOGGLE_SET((epr), USB_EP_RX_STALL, USB_EPRX_STAT)
  29. #define EP_TX_UNSTALL(epr) EP_TOGGLE_SET((epr), USB_EP_TX_NAK, USB_EPTX_STAT | USB_EP_DTOG_TX)
  30. #define EP_RX_UNSTALL(epr) EP_TOGGLE_SET((epr), USB_EP_RX_VALID, USB_EPRX_STAT | USB_EP_DTOG_RX)
  31. #define EP_DTX_UNSTALL(epr) EP_TOGGLE_SET((epr), USB_EP_TX_VALID, USB_EPTX_STAT | USB_EP_DTOG_TX | USB_EP_SWBUF_TX)
  32. #define EP_DRX_UNSTALL(epr) EP_TOGGLE_SET((epr), USB_EP_RX_VALID | USB_EP_SWBUF_RX, USB_EPRX_STAT | USB_EP_DTOG_RX | USB_EP_SWBUF_RX)
  33. #define EP_TX_VALID(epr) EP_TOGGLE_SET((epr), USB_EP_TX_VALID, USB_EPTX_STAT)
  34. #define EP_RX_VALID(epr) EP_TOGGLE_SET((epr), USB_EP_RX_VALID, USB_EPRX_STAT)
  35. typedef struct {
  36. uint16_t addr;
  37. uint16_t :16;
  38. uint16_t cnt;
  39. uint16_t :16;
  40. } pma_rec;
  41. typedef union pma_table {
  42. struct {
  43. pma_rec tx;
  44. pma_rec rx;
  45. };
  46. struct {
  47. pma_rec tx0;
  48. pma_rec tx1;
  49. };
  50. struct {
  51. pma_rec rx0;
  52. pma_rec rx1;
  53. };
  54. } pma_table;
  55. /** \brief Helper function. Returns pointer to the buffer descriptor table.
  56. */
  57. inline static pma_table *EPT(uint8_t ep) {
  58. return (pma_table*)((ep & 0x07) * 16 + USB_PMAADDR);
  59. }
  60. /** \brief Helper function. Returns pointer to the endpoint control register.
  61. */
  62. inline static volatile uint16_t *EPR(uint8_t ep) {
  63. return (uint16_t*)((ep & 0x07) * 4 + USB_BASE);
  64. }
  65. /** \brief Helper function. Returns next available PMA buffer.
  66. *
  67. * \param sz uint16_t Requested buffer size.
  68. * \return uint16_t Buffer address for PMA table.
  69. * \note PMA buffers grown from top to bottom like stack.
  70. */
  71. static uint16_t get_next_pma(uint16_t sz) {
  72. unsigned _result = USB_PMASIZE;
  73. for (int i = 0; i < 8; i++) {
  74. pma_table *tbl = EPT(i);
  75. if ((tbl->tx.addr) && (tbl->tx.addr < _result)) _result = tbl->tx.addr;
  76. if ((tbl->rx.addr) && (tbl->rx.addr < _result)) _result = tbl->rx.addr;
  77. }
  78. if ( _result < (4 * sizeof(pma_table) + sz)) {
  79. return 0;
  80. } else {
  81. return _result - sz;
  82. }
  83. }
  84. void ep_setstall(uint8_t ep, bool stall) {
  85. volatile uint16_t *reg = EPR(ep);
  86. /* ISOCHRONOUS endpoint can't be stalled or unstalled */
  87. if (USB_EP_ISOCHRONOUS == (*reg & USB_EP_T_FIELD)) return;
  88. /* If it's an IN endpoint */
  89. if (ep & 0x80) {
  90. /* DISABLED endpoint can't be stalled or unstalled */
  91. if (USB_EP_TX_DIS == (*reg & USB_EPTX_STAT)) return;
  92. if (stall) {
  93. EP_TX_STALL(reg);
  94. } else {
  95. /* if it's a doublebuffered endpoint */
  96. if ((USB_EP_KIND | USB_EP_BULK) == (*reg & (USB_EP_T_FIELD | USB_EP_KIND))) {
  97. /* set endpoint to VALID and clear DTOG_TX & SWBUF_TX */
  98. EP_DTX_UNSTALL(reg);
  99. } else {
  100. /* set endpoint to NAKED and clear DTOG_TX */
  101. EP_TX_UNSTALL(reg);
  102. }
  103. }
  104. } else {
  105. if (USB_EP_RX_DIS == (*reg & USB_EPRX_STAT)) return;
  106. if (stall) {
  107. EP_RX_STALL(reg);
  108. } else {
  109. /* if it's a doublebuffered endpoint */
  110. if ((USB_EP_KIND | USB_EP_BULK) == (*reg & (USB_EP_T_FIELD | USB_EP_KIND))) {
  111. /* set endpoint to VALID, clear DTOG_RX, set SWBUF_RX */
  112. EP_DRX_UNSTALL(reg);
  113. } else {
  114. /* set endpoint to VALID and clear DTOG_RX */
  115. EP_RX_UNSTALL(reg);
  116. }
  117. }
  118. }
  119. }
  120. bool ep_isstalled(uint8_t ep) {
  121. if (ep & 0x80) {
  122. return (USB_EP_TX_STALL == (USB_EPTX_STAT & *EPR(ep)));
  123. } else {
  124. return (USB_EP_RX_STALL == (USB_EPRX_STAT & *EPR(ep)));
  125. }
  126. }
  127. void enable(bool enable) {
  128. if (enable) {
  129. RCC->APB1ENR |= RCC_APB1ENR_USBEN;
  130. RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;
  131. RCC->APB1RSTR |= RCC_APB1RSTR_USBRST;
  132. RCC->APB1RSTR &= ~RCC_APB1RSTR_USBRST;
  133. USB->CNTR = USB_CNTR_CTRM | USB_CNTR_RESETM | USB_CNTR_ERRM |
  134. #if !defined(USBD_SOF_DISABLED)
  135. USB_CNTR_SOFM |
  136. #endif
  137. USB_CNTR_SUSPM | USB_CNTR_WKUPM;
  138. } else if (RCC->APB1ENR & RCC_APB1ENR_USBEN) {
  139. SYSCFG->PMC &= ~SYSCFG_PMC_USB_PU;
  140. RCC->APB1RSTR |= RCC_APB1RSTR_USBRST;
  141. RCC->APB1ENR &= ~RCC_APB1ENR_USBEN;
  142. }
  143. }
  144. void reset (void) {
  145. USB->CNTR |= USB_CNTR_FRES;
  146. USB->CNTR &= ~USB_CNTR_FRES;
  147. }
  148. uint8_t connect(bool connect) {
  149. if (connect) {
  150. SYSCFG->PMC |= SYSCFG_PMC_USB_PU;
  151. } else {
  152. SYSCFG->PMC &= ~SYSCFG_PMC_USB_PU;
  153. }
  154. return usbd_lane_unk;
  155. }
  156. void setaddr (uint8_t addr) {
  157. USB->DADDR = USB_DADDR_EF | addr;
  158. }
  159. bool ep_config(uint8_t ep, uint8_t eptype, uint16_t epsize) {
  160. volatile uint16_t *reg = EPR(ep);
  161. pma_table *tbl = EPT(ep);
  162. /* epsize should be 16-bit aligned */
  163. if (epsize & 0x01) epsize++;
  164. switch (eptype) {
  165. case USB_EPTYPE_CONTROL:
  166. *reg = USB_EP_CONTROL | (ep & 0x07);
  167. break;
  168. case USB_EPTYPE_ISOCHRONUS:
  169. *reg = USB_EP_ISOCHRONOUS | (ep & 0x07);
  170. break;
  171. case USB_EPTYPE_BULK:
  172. *reg = USB_EP_BULK | (ep & 0x07);
  173. break;
  174. case USB_EPTYPE_BULK | USB_EPTYPE_DBLBUF:
  175. *reg = USB_EP_BULK | USB_EP_KIND | (ep & 0x07);
  176. break;
  177. default:
  178. *reg = USB_EP_INTERRUPT | (ep & 0x07);
  179. break;
  180. }
  181. /* if it TX or CONTROL endpoint */
  182. if ((ep & 0x80) || (eptype == USB_EPTYPE_CONTROL)) {
  183. uint16_t _pma;
  184. _pma = get_next_pma(epsize);
  185. if (_pma == 0) return false;
  186. tbl->tx.addr = _pma;
  187. tbl->tx.cnt = 0;
  188. if ((eptype == USB_EPTYPE_ISOCHRONUS) ||
  189. (eptype == (USB_EPTYPE_BULK | USB_EPTYPE_DBLBUF))) {
  190. _pma = get_next_pma(epsize);
  191. if (_pma == 0) return false;
  192. tbl->tx1.addr = _pma;
  193. tbl->tx1.cnt = 0;
  194. EP_DTX_UNSTALL(reg);
  195. } else {
  196. EP_TX_UNSTALL(reg);
  197. }
  198. }
  199. if (!(ep & 0x80)) {
  200. uint16_t _rxcnt;
  201. uint16_t _pma;
  202. if (epsize > 62) {
  203. if (epsize & 0x1F) {
  204. epsize &= 0x1F;
  205. } else {
  206. epsize -= 0x20;
  207. }
  208. _rxcnt = 0x8000 | (epsize << 5);
  209. epsize += 0x20;
  210. } else {
  211. _rxcnt = epsize << 9;
  212. }
  213. _pma = get_next_pma(epsize);
  214. if (_pma == 0) return false;
  215. tbl->rx.addr = _pma;
  216. tbl->rx.cnt = _rxcnt;
  217. if ((eptype == USB_EPTYPE_ISOCHRONUS) ||
  218. (eptype == (USB_EPTYPE_BULK | USB_EPTYPE_DBLBUF))) {
  219. _pma = get_next_pma(epsize);
  220. if (_pma == 0) return false;
  221. tbl->rx0.addr = _pma;
  222. tbl->rx0.cnt = _rxcnt;
  223. EP_DRX_UNSTALL(reg);
  224. } else {
  225. EP_RX_UNSTALL(reg);
  226. }
  227. }
  228. return true;
  229. }
  230. void ep_deconfig(uint8_t ep) {
  231. pma_table *ept = EPT(ep);
  232. *EPR(ep) &= ~USB_EPREG_MASK;
  233. ept->rx.addr = 0;
  234. ept->rx.cnt = 0;
  235. ept->tx.addr = 0;
  236. ept->tx.cnt = 0;
  237. }
  238. static uint16_t pma_read (uint8_t *buf, uint16_t blen, pma_rec *rx) {
  239. uint16_t *pma = (void*)(USB_PMAADDR + 2 * rx->addr);
  240. uint16_t rxcnt = rx->cnt & 0x03FF;
  241. rx->cnt &= ~0x3FF;
  242. if (blen > rxcnt) {
  243. blen = rxcnt;
  244. }
  245. rxcnt = blen;
  246. while (blen) {
  247. uint16_t _t = *pma;
  248. *buf++ = _t & 0xFF;
  249. if (--blen) {
  250. *buf++ = _t >> 8;
  251. pma += 2;
  252. blen--;
  253. } else break;
  254. }
  255. return rxcnt;
  256. }
  257. int32_t ep_read(uint8_t ep, void *buf, uint16_t blen) {
  258. pma_table *tbl = EPT(ep);
  259. volatile uint16_t *reg = EPR(ep);
  260. switch (*reg & (USB_EPRX_STAT | USB_EP_T_FIELD | USB_EP_KIND)) {
  261. /* doublebuffered bulk endpoint */
  262. case (USB_EP_RX_VALID | USB_EP_BULK | USB_EP_KIND):
  263. /* switching SWBUF if EP is NAKED */
  264. switch (*reg & (USB_EP_DTOG_RX | USB_EP_SWBUF_RX)) {
  265. case 0:
  266. case (USB_EP_DTOG_RX | USB_EP_SWBUF_RX):
  267. *reg = (*reg & USB_EPREG_MASK) | USB_EP_SWBUF_RX;
  268. default:
  269. break;
  270. }
  271. if (*reg & USB_EP_SWBUF_RX) {
  272. return pma_read(buf, blen, &(tbl->rx1));
  273. } else {
  274. return pma_read(buf, blen, &(tbl->rx0));
  275. }
  276. /* isochronous endpoint */
  277. case (USB_EP_RX_VALID | USB_EP_ISOCHRONOUS):
  278. if (*reg & USB_EP_DTOG_RX) {
  279. return pma_read(buf, blen, &(tbl->rx1));
  280. } else {
  281. return pma_read(buf, blen, &(tbl->rx0));
  282. }
  283. /* regular endpoint */
  284. case (USB_EP_RX_NAK | USB_EP_BULK):
  285. case (USB_EP_RX_NAK | USB_EP_CONTROL):
  286. case (USB_EP_RX_NAK | USB_EP_INTERRUPT):
  287. {
  288. int32_t res = pma_read(buf, blen, &(tbl->rx));
  289. /* setting endpoint to VALID state */
  290. EP_RX_VALID(reg);
  291. return res;
  292. }
  293. /* invalid or not ready */
  294. default:
  295. return -1;
  296. }
  297. }
  298. static void pma_write(const uint8_t *buf, uint16_t blen, pma_rec *tx) {
  299. uint16_t *pma = (void*)(USB_PMAADDR + 2 * (tx->addr));
  300. tx->cnt = blen;
  301. while (blen > 1) {
  302. *pma = buf[1] << 8 | buf[0];
  303. pma += 2;
  304. buf += 2;
  305. blen -= 2;
  306. }
  307. if (blen) *pma = *buf;
  308. }
  309. int32_t ep_write(uint8_t ep, void *buf, uint16_t blen) {
  310. pma_table *tbl = EPT(ep);
  311. volatile uint16_t *reg = EPR(ep);
  312. switch (*reg & (USB_EPTX_STAT | USB_EP_T_FIELD | USB_EP_KIND)) {
  313. /* doublebuffered bulk endpoint */
  314. case (USB_EP_TX_NAK | USB_EP_BULK | USB_EP_KIND):
  315. if (*reg & USB_EP_SWBUF_TX) {
  316. pma_write(buf, blen, &(tbl->tx1));
  317. } else {
  318. pma_write(buf, blen, &(tbl->tx0));
  319. }
  320. *reg = (*reg & USB_EPREG_MASK) | USB_EP_SWBUF_TX;
  321. break;
  322. /* isochronous endpoint */
  323. case (USB_EP_TX_VALID | USB_EP_ISOCHRONOUS):
  324. if (!(*reg & USB_EP_DTOG_TX)) {
  325. pma_write(buf, blen, &(tbl->tx1));
  326. } else {
  327. pma_write(buf, blen, &(tbl->tx0));
  328. }
  329. break;
  330. /* regular endpoint */
  331. case (USB_EP_TX_NAK | USB_EP_BULK):
  332. case (USB_EP_TX_NAK | USB_EP_CONTROL):
  333. case (USB_EP_TX_NAK | USB_EP_INTERRUPT):
  334. pma_write(buf, blen, &(tbl->tx));
  335. EP_TX_VALID(reg);
  336. break;
  337. /* invalid or not ready */
  338. default:
  339. return -1;
  340. }
  341. return blen;
  342. }
  343. uint16_t get_frame (void) {
  344. return USB->FNR & USB_FNR_FN;
  345. }
  346. void evt_poll(usbd_device *dev, usbd_evt_callback callback) {
  347. uint8_t _ev, _ep;
  348. uint16_t _istr = USB->ISTR;
  349. _ep = _istr & USB_ISTR_EP_ID;
  350. if (_istr & USB_ISTR_CTR) {
  351. volatile uint16_t *reg = EPR(_ep);
  352. if (*reg & USB_EP_CTR_TX) {
  353. *reg &= (USB_EPREG_MASK ^ USB_EP_CTR_TX);
  354. _ep |= 0x80;
  355. _ev = usbd_evt_eptx;
  356. } else {
  357. *reg &= (USB_EPREG_MASK ^ USB_EP_CTR_RX);
  358. _ev = (*reg & USB_EP_SETUP) ? usbd_evt_epsetup : usbd_evt_eprx;
  359. }
  360. } else if (_istr & USB_ISTR_RESET) {
  361. USB->ISTR &= ~USB_ISTR_RESET;
  362. USB->BTABLE = 0;
  363. for (int i = 0; i < 8; i++) {
  364. ep_deconfig(i);
  365. }
  366. _ev = usbd_evt_reset;
  367. #if !defined(USBD_SOF_DISABLED)
  368. } else if (_istr & USB_ISTR_SOF) {
  369. _ev = usbd_evt_sof;
  370. USB->ISTR &= ~USB_ISTR_SOF;
  371. #endif
  372. } else if (_istr & USB_ISTR_WKUP) {
  373. _ev = usbd_evt_wkup;
  374. USB->CNTR &= ~USB_CNTR_FSUSP;
  375. USB->ISTR &= ~USB_ISTR_WKUP;
  376. } else if (_istr & USB_ISTR_SUSP) {
  377. _ev = usbd_evt_susp;
  378. USB->CNTR |= USB_CNTR_FSUSP;
  379. USB->ISTR &= ~USB_ISTR_SUSP;
  380. } else if (_istr & USB_ISTR_ERR) {
  381. USB->ISTR &= ~USB_ISTR_ERR;
  382. _ev = usbd_evt_error;
  383. } else {
  384. return;
  385. }
  386. callback(dev, _ev, _ep);
  387. }
  388. static uint32_t fnv1a32_turn (uint32_t fnv, uint32_t data ) {
  389. for (int i = 0; i < 4 ; i++) {
  390. fnv ^= (data & 0xFF);
  391. fnv *= 16777619;
  392. data >>= 8;
  393. }
  394. return fnv;
  395. }
  396. uint16_t get_serialno_desc(void *buffer) {
  397. struct usb_string_descriptor *dsc = buffer;
  398. uint16_t *str = dsc->wString;
  399. uint32_t fnv = 2166136261;
  400. fnv = fnv1a32_turn(fnv, *(uint32_t*)(UID_BASE + 0x00));
  401. fnv = fnv1a32_turn(fnv, *(uint32_t*)(UID_BASE + 0x04));
  402. fnv = fnv1a32_turn(fnv, *(uint32_t*)(UID_BASE + 0x14));
  403. for (int i = 28; i >= 0; i -= 4 ) {
  404. uint16_t c = (fnv >> i) & 0x0F;
  405. c += (c < 10) ? '0' : ('A' - 10);
  406. *str++ = c;
  407. }
  408. dsc->bDescriptorType = USB_DTYPE_STRING;
  409. dsc->bLength = 18;
  410. return 18;
  411. }
  412. const struct usbd_driver usb_stmv1 = {
  413. 0,
  414. enable,
  415. reset,
  416. connect,
  417. setaddr,
  418. ep_config,
  419. ep_deconfig,
  420. ep_read,
  421. ep_write,
  422. ep_setstall,
  423. ep_isstalled,
  424. evt_poll,
  425. get_frame,
  426. get_serialno_desc,
  427. };
  428. #endif //USE_STM32V1_DRIVER