usbd_stm32l100_devfs_asm.S 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835
  1. /* This file is the part of the Lightweight USB device Stack for STM32 microcontrollers
  2. *
  3. * Copyright ©2016 Dmitry Filimonchuk <dmitrystu[at]gmail[dot]com>
  4. *
  5. * Licensed under the Apache License, Version 2.0 (the "License");
  6. * you may not use this file except in compliance with the License.
  7. * You may obtain a copy of the License at
  8. * http://www.apache.org/licenses/LICENSE-2.0
  9. * Unless required by applicable law or agreed to in writing, software
  10. * distributed under the License is distributed on an "AS IS" BASIS,
  11. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. * See the License for the specific language governing permissions and
  13. * limitations under the License.
  14. */
  15. #if !defined (__ASSEMBLER__)
  16. #define __ASSEMBLER__
  17. #endif
  18. #include "usb.h"
  19. #if defined(USBD_STM32L100)
  20. #include "memmap.inc"
  21. #define EP_SETUP 0x0800
  22. #define EP_TYPE 0x0600
  23. #define EP_KIND 0x0100
  24. #define EP_ADDR 0x000F
  25. #define EP_RX_CTR 0x8000
  26. #define EP_RX_DTOG 0x4000
  27. #define EP_RX_STAT 0x3000
  28. #define EP_RX_SWBUF 0x0040
  29. #define EP_RX_DIS 0x0000
  30. #define EP_RX_STAL 0x1000
  31. #define EP_RX_NAK 0x2000
  32. #define EP_RX_VAL 0x3000
  33. #define EP_TX_CTR 0x0080
  34. #define EP_TX_DTOG 0x0040
  35. #define EP_TX_STAT 0x0030
  36. #define EP_TX_SWBUF 0x4000
  37. #define EP_TX_DIS 0x0000
  38. #define EP_TX_STAL 0x0010
  39. #define EP_TX_NAK 0x0020
  40. #define EP_TX_VAL 0x0030
  41. #define RXADDR0 0x00
  42. #define RXCOUNT0 0x04
  43. #define RXADDR1 0x08
  44. #define RXCOUNT1 0x0C
  45. #define TXADDR0 0x00
  46. #define TXCOUNT0 0x04
  47. #define TXADDR1 0x08
  48. #define TXCOUNT1 0x0C
  49. #define TXADDR 0x00
  50. #define TXCOUNT 0x04
  51. #define RXADDR 0x08
  52. #define RXCOUNT 0x0C
  53. #define EP_NOTOG (EP_RX_CTR | EP_TX_CTR | EP_SETUP | EP_TYPE | EP_KIND | EP_ADDR)
  54. #define TGL_SET(mask, bits) ((EP_NOTOG | (mask))<<16 | (bits))
  55. #define TX_STALL TGL_SET(EP_TX_STAT, EP_TX_STAL)
  56. #define RX_STALL TGL_SET(EP_RX_STAT, EP_RX_STAL)
  57. #define TX_USTALL TGL_SET(EP_TX_STAT | EP_TX_DTOG, EP_TX_NAK)
  58. #define RX_USTALL TGL_SET(EP_RX_STAT | EP_RX_DTOG, EP_RX_VAL)
  59. #define DTX_USTALL TGL_SET(EP_TX_STAT | EP_TX_DTOG | EP_TX_SWBUF, EP_TX_VAL)
  60. #define DRX_USTALL TGL_SET(EP_RX_STAT | EP_RX_DTOG | EP_RX_SWBUF, EP_RX_VAL | EP_RX_SWBUF)
  61. .syntax unified
  62. .cpu cortex-m3
  63. .text
  64. .thumb
  65. .globl usbd_devfs_asm
  66. .align 2
  67. usbd_devfs_asm:
  68. .long _getinfo
  69. .long _enable
  70. .long _connect
  71. .long _setaddr
  72. .long _ep_config
  73. .long _ep_deconfig
  74. .long _ep_read
  75. .long _ep_write
  76. .long _ep_setstall
  77. .long _ep_isstalled
  78. .long _evt_poll
  79. .long _get_frame
  80. .long _get_serial_desc
  81. .size usbd_devfs_asm, . - usbd_devfs_asm
  82. .thumb_func
  83. .type _get_serial_desc, %function
  84. /* uint16_t get_serial_desc (void *buffer)
  85. * R0 <- buffer for the string descriptor
  86. * descrpitor size -> R0
  87. */
  88. _get_serial_desc:
  89. push {r4, r5, lr}
  90. movs r1, #18 //descriptor size 18 bytes
  91. strb r1, [r0]
  92. movs r1, #0x03 //DTYPE_STRING
  93. strb r1, [r0, #0x01]
  94. ldr r5, .L_uid_base //UID3 this is the serial number
  95. ldr r4, .L_fnv1a_offset //FNV1A offset
  96. ldr r2, [r5, 0x00] //UID0
  97. bl .L_fnv1a
  98. ldr r2, [r5, 0x04] //UID1
  99. bl .L_fnv1a
  100. ldr r2, [r5, 0x14] //UID2
  101. bl .L_fnv1a
  102. movs r3, #28
  103. .L_gsn_loop:
  104. lsrs r1, r4, r3
  105. and r1, #0x0F
  106. cmp r1, #0x09
  107. ite gt
  108. addgt r1, #55
  109. addle r1, #48
  110. .L_gsn_store:
  111. adds r0, #0x02
  112. strb r1, [r0]
  113. lsrs r1, #0x08
  114. strb r1, [r0, #0x01]
  115. subs r3, #0x04
  116. bpl .L_gsn_loop
  117. movs r0, #18
  118. pop {r4, r5, pc}
  119. .L_fnv1a:
  120. movs r3, #0x04
  121. .L_fnv1a_loop:
  122. uxtb r1, r2
  123. eors r4, r1
  124. ldr r1, .L_fnv1a_prime //FNV1A prime
  125. muls r4, r1
  126. lsrs r2, #0x08
  127. subs r3, #0x01
  128. bne .L_fnv1a_loop
  129. bx lr
  130. .align 2
  131. .L_uid_base: .long UID_BASE
  132. .L_fnv1a_offset: .long 2166136261
  133. .L_fnv1a_prime: .long 16777619
  134. .size _get_serial_desc, . - _get_serial_desc
  135. .thumb_func
  136. .type _connect, %function
  137. _connect:
  138. ldr r1, =#SYSCFG_BASE
  139. movs r3, #0x01
  140. ldr r2, [r1, #SYSCFG_PMC]
  141. bics r2, r3
  142. cbz r0, .L_conn_store
  143. orrs r2, r3
  144. .L_conn_store:
  145. str r2, [r1, #SYSCFG_PMC]
  146. movs r0, #usbd_lane_unk
  147. bx lr
  148. .size _connect, . - _connect
  149. .thumb_func
  150. .type _getinfo, %function
  151. _getinfo:
  152. movs r0, 0
  153. ldr r2, =#RCC_BASE
  154. ldr r1, [r2, #RCC_APB1ENR]
  155. lsrs r1, #24 //USBEN -> CF
  156. bcc .L_getinfo_end
  157. adds r0, #USBD_HW_ENABLED
  158. ldr r2, =#SYSCFG_BASE
  159. ldr r1, [r2, #SYSCFG_PMC]
  160. lsrs r1, #1 //PU -> CF
  161. bcc .L_getinfo_end
  162. adds r0, #USBD_HW_SPEED_FS
  163. .L_getinfo_end:
  164. bx lr
  165. .size _getinfo, . - _getinfo
  166. .thumb_func
  167. .type _setaddr, %function
  168. _setaddr:
  169. ldr r1, =USB_REGBASE
  170. adds r0, #0x80
  171. strh r0, [r1, #USB_DADDR] //USB->DADDR
  172. bx lr
  173. .size _setaddr, . - _setaddr
  174. .thumb_func
  175. .type _get_frame, %function
  176. _get_frame:
  177. ldr r0, =#USB_REGBASE
  178. ldrh r0, [r0, #USB_FNR] //FNR
  179. lsls r0, #21
  180. lsrs r0, #21
  181. bx lr
  182. .size _get_frame, . - _get_frame
  183. .thumb_func
  184. .type _enable, %function
  185. _enable:
  186. ldr r2, =#RCC_BASE //RCC
  187. movs r3, #0x01
  188. lsls r3, #23 //USBEN or USBRST
  189. cbz r0, .L_disable
  190. .L_enable:
  191. /* enabling and resetting USB peripheral */
  192. ldr r1, =#USB_REGBASE
  193. ldr r0, [r2, #RCC_APB1ENR]
  194. orrs r0, r3
  195. str r0, [r2, #RCC_APB1ENR] //RCC->APB1ENR |= USBEN
  196. ldr r0, [r2, #RCC_APB1RSTR]
  197. orrs r0, r3
  198. str r0, [r2, #RCC_APB1RSTR] //RCC->APB1RSTR |= USBRST
  199. bics r0, r3
  200. str r0, [r2, #RCC_APB1RSTR] //RCC->APB1RSTR &= ~USBRST
  201. /* enabling SYSCFG peripheral */
  202. movs r3, #0x01 //SYSCFGEN
  203. ldr r0, [r2, #RCC_APB2ENR]
  204. orrs r0, r3
  205. str r0, [r2, #RCC_APB2ENR]
  206. /* setting up USB CNTR */
  207. #if !defined(USBD_SOF_DISABLED)
  208. movs r0, #0xBE // CTRM | ERRM | WKUPM | SUSPM | RESETM | SOFM
  209. #else
  210. movs r0, #0xBC // CTRM | ERRM | WKUPM | SUSPM | RESETM
  211. #endif
  212. lsls r0, #0x08
  213. strh r0, [r1, #USB_CNTR] //set USB->CNTR
  214. bx lr
  215. .L_disable:
  216. ldr r0, [r2, #RCC_APB1ENR]
  217. tst r0, r3
  218. beq .L_enable_end // usb is already disabled
  219. /* disabling USB peripheral */
  220. bics r0, r3
  221. str r0, [r2, #RCC_APB1ENR]
  222. /* disabling USB_PU in SYSCFG_PMC */
  223. movs r3, #0x01
  224. ldr r1, =#SYSCFG_BASE
  225. ldr r0, [r1, #SYSCFG_PMC]
  226. bics r0, r3
  227. str r0, [r1, #SYSCFG_PMC]
  228. bx lr
  229. .L_enable_end:
  230. bx lr
  231. .size _enable, . - _enable
  232. .thumb_func
  233. .type _ep_setstall, %function
  234. /*void ep_settall(uint8_t ep, bool stall)
  235. * in R0 <- endpoint number
  236. * in R1 <- 0 if unstall, !0 if stall
  237. */
  238. _ep_setstall:
  239. push {r4, lr}
  240. lsls r2, r0, #28
  241. lsrs r2, #26
  242. ldr r3, =#USB_EPBASE
  243. adds r3, r2 // epr -> r3
  244. movs r2, 0x30 // TX_STAT_MASK -> r2
  245. ldrh r4, [r3]
  246. lsls r4, #21
  247. lsrs r4, #29 // EP_TYPE | EP_KIND -> R4 LSB
  248. cmp r4, #0x04 // ISO ?
  249. beq .L_eps_exit
  250. cmp r0, #0x80
  251. blo .L_eps_rx
  252. .L_eps_tx:
  253. ldr r0, =#TX_STALL //stall TX
  254. cmp r1, #0x00
  255. bne .L_eps_reg_set
  256. .L_eps_tx_unstall:
  257. ldr r0, =#DTX_USTALL //unstall dblbulk or iso TX (VALID and clr DTOG_TX & SWBUF_TX)
  258. cmp r4, #0x01 // if doublebuffered bulk endpoint
  259. beq .L_eps_reg_set
  260. ldr r0, =#TX_USTALL // unstall other TX (NAKED + clr DTOG_TX)
  261. b .L_eps_reg_set
  262. .L_eps_rx:
  263. lsls r2, #8 // RX_STAT_MASK -> R2
  264. ldr r0,=#RX_STALL //stall RX
  265. cmp r1, #0x00
  266. bne .L_eps_reg_set
  267. .L_eps_rx_unstall:
  268. ldr r0, =#DRX_USTALL //unstall dblbulk or iso (VALID. clr DTOG_RX set SWBUF_RX)
  269. cmp r4, #0x01 // if dblbulk
  270. beq .L_eps_reg_set
  271. ldr r0, =#RX_USTALL // unstall other RX (VALID + clr
  272. /* R0 - mask and toggle bits
  273. * R2 - mask for STAT bits
  274. * R3 - endpoint register pointer
  275. */
  276. .L_eps_reg_set:
  277. ldrh r1, [r3] // *epr -> r1
  278. ands r2, r1 // check if endpoint disabled
  279. beq .L_eps_exit // do nothing
  280. eors r1, r0
  281. lsrs r0, #16
  282. ands r1, r0
  283. strh r1, [r3]
  284. .L_eps_exit:
  285. pop {r4, pc}
  286. .size _ep_setstall, . - _ep_setstall
  287. .thumb_func
  288. .type _ep_isstalled, %function
  289. /* bool ep_isstalled(uint8t ep) */
  290. _ep_isstalled:
  291. ldr r1, =#USB_EPBASE
  292. lsls r2, r0, #28
  293. lsrs r2, #26
  294. ldr r1, [r1, r2]
  295. lsls r1, #17
  296. cmp r0, #0x80
  297. bhs .L_eis_check
  298. lsls r1, #8
  299. .L_eis_check:
  300. lsrs r1, r1, #28
  301. subs r1, #0x01
  302. subs r0, r1, #0x01
  303. sbcs r1, r1
  304. rsbs r0, r1, #0
  305. bx lr
  306. .size _ep_isstalled, . - _ep_isstalled
  307. .thumb_func
  308. .type _ep_read, %function
  309. /* int32_t _ep_read(uint8_t ep, void *buf, uint16_t blen)
  310. * in R0 <- endpoint
  311. * in R1 <- *buffer
  312. * in R2 <- length of the buffer
  313. * out length of the recieved data -> R0 or 0 on error
  314. */
  315. _ep_read:
  316. push {r4, r5, lr}
  317. ldr r3, =#USB_EPBASE
  318. ldr r4, =#USB_PMABASE
  319. lsls r0, #28
  320. lsrs r0, #26
  321. adds r3, r0 // *EPR -> R3
  322. lsls r0, #2
  323. adds r4, r0 // *EPT -> R4
  324. ldrh r5, [r3] // reading epr
  325. /* validating endpoint */
  326. movs r0, #0x37
  327. lsls r0, #0x08
  328. ands r0, r5
  329. lsrs r0, #0x08
  330. cmp r0, #0x34 // (OK) RX_VALID + ISO
  331. beq .L_epr_iso
  332. cmp r0, #0x31 // (OK) RX_VALID + DBLBULK
  333. beq .L_epr_dbl
  334. cmp r0, #0x20 // (OK) RX_NAKED + BULK
  335. beq .L_epr_sngl
  336. cmp r0, #0x22 // (OK) RX_NAKED + CTRL
  337. beq .L_epr_sngl
  338. cmp r0, #0x26 // (OK) RX_NAKED + INTR
  339. beq .L_epr_sngl
  340. movs r0, #0xFF // endpoint contains no valid data
  341. sxtb r0, r0
  342. b .L_epr_exit
  343. /* processing */
  344. .L_epr_dbl:
  345. lsrs r0, r5, #8
  346. eors r0, r5
  347. lsrs r0, #7 // SW_RX ^ DTOG_RX -> CF
  348. bcs .L_epr_notog // jmp if SW_RX != DTOG_RX (VALID)
  349. ldr r0, =#EP_NOTOG
  350. ands r5, r0
  351. adds r5, #EP_RX_SWBUF
  352. strh r5, [r3] // toggling SW_RX
  353. .L_epr_notog:
  354. ldrh r5, [r3]
  355. lsls r5, #8 // shift SW_RX to DTOG_RX
  356. .L_epr_iso:
  357. lsrs r5, #15 // DTOG_RX -> CF
  358. bcs .L_epr_sngl
  359. subs r4, #0x08 // set RXADDR0
  360. .L_epr_sngl:
  361. ldrh r0, [r4, #RXCOUNT]
  362. lsrs r5, r0, #0x0A
  363. lsls r5, #0x0A // r5 = r5 & ~0x03FF
  364. strh r5, [r4, #RXCOUNT]
  365. lsls r0, #22
  366. lsrs r0, #22 // r0 &= 0x3FF (RX count)
  367. ldrh r5, [r4, #RXADDR]
  368. ldr r4, =#USB_PMABASE
  369. lsls r5, #0x01
  370. adds r5, r4 // R5 now has a physical address
  371. cmp r2, r0
  372. blo .L_epr_read
  373. mov r2, r0 // if buffer is larger
  374. .L_epr_read:
  375. cmp r2, #1
  376. blo .L_epr_read_end
  377. ldrh r4, [r5]
  378. strb r4, [r1]
  379. beq .L_epr_read_end
  380. lsrs r4, #8
  381. strb r4, [r1, #1]
  382. adds r1, #2
  383. adds r5, #4
  384. subs r2, #2
  385. bhi .L_epr_read
  386. .L_epr_read_end:
  387. ldrh r5, [r3] // reload EPR
  388. lsls r1, r5, #21
  389. lsrs r1, #29
  390. cmp r1, #0x04
  391. beq .L_epr_exit // ep is iso. no needs to set it to valid
  392. cmp r1, #0x01
  393. beq .L_epr_exit // ep is dblbulk. no needs to set it to valid
  394. ldr r2, =#TGL_SET(EP_RX_STAT , EP_RX_VAL)
  395. eors r5, r2
  396. lsrs r2, #16
  397. ands r5, r2
  398. strh r5, [r3] // set ep to VALID state
  399. .L_epr_exit:
  400. pop {r4, r5, pc}
  401. .size _ep_read, . - _ep_read
  402. .thumb_func
  403. .type _ep_write, %function
  404. /* int32_t ep_write(uint8_t ep, void *buf, uint16_t blen)
  405. * R0 -> endpoint
  406. * R1 -> *buffer
  407. * R2 -> data length
  408. * result -> R0
  409. */
  410. _ep_write:
  411. push {r4, r5, r6, lr}
  412. ldr r3, =#USB_EPBASE
  413. ldr r4, =#USB_PMABASE
  414. lsls r0, #28
  415. lsrs r0, #26
  416. adds r3, r0 // *EPR -> R3
  417. lsls r0, #2
  418. adds r4, r0 // TXADDR0 -> R4
  419. ldrh r5, [r3] // reading epr
  420. movs r0, #0x73
  421. lsls r0, #4
  422. ands r0, r5
  423. lsrs r0, #4
  424. cmp r0, #0x43 // (OK) TX_VALID + ISO
  425. beq .L_epw_iso
  426. cmp r0, #0x12 // (OK) TX_NAK + DBLBULK
  427. beq .L_epw_dbl
  428. cmp r0, #0x02 // (OK) TX_NAK + BULK
  429. beq .L_epw_sngl
  430. cmp r0, #0x22 // (OK) TX_NAK + CONTROL
  431. beq .L_epw_sngl
  432. cmp r0, #0x62 // (OK) TX_NAK + INTERRUPT
  433. beq .L_epw_sngl
  434. movs r0, #0xFF
  435. sxtb r0, r0
  436. b .L_epw_exit
  437. .L_epw_dbl:
  438. mvns r5, r5
  439. lsrs r5, #8 // ~SWBUF_TX -> DTOG_TX
  440. .L_epw_iso:
  441. lsrs r5, #7 // DTOG_TX -> CF
  442. bcs .L_epw_sngl
  443. adds r4, #8 // TXADDR1 -> R4
  444. .L_epw_sngl:
  445. strh r2, [r4, #TXCOUNT]
  446. mov r0, r2 // save count for return
  447. ldrh r5, [r4, #TXADDR]
  448. ldr r4, =#USB_PMABASE
  449. lsls r5, #1
  450. adds r5, r4 // PMA BUFFER -> R5
  451. .L_epw_write:
  452. cmp r2, #1
  453. blo .L_epw_write_end
  454. ldrb r4, [r1]
  455. beq .L_epw_store
  456. ldrb r6, [r1, #1]
  457. lsls r6, #8
  458. orrs r4, r6
  459. .L_epw_store:
  460. strh r4, [r5]
  461. adds r5, #4
  462. adds r1, #2
  463. subs r2, #2
  464. bhi .L_epw_write
  465. .L_epw_write_end:
  466. ldrh r5, [r3] // reload EPR
  467. lsls r1, r5, #21
  468. lsrs r1, #29
  469. cmp r1, #0x04
  470. beq .L_epw_exit // isochronous ep. do nothing
  471. ldr r2, =#TGL_SET(EP_TX_STAT, EP_TX_VAL)
  472. cmp r1, #0x01
  473. bne .L_epw_setstate // NOT a doublebuffered bulk
  474. ldr r2, =#TGL_SET(EP_TX_SWBUF, EP_TX_SWBUF)
  475. bics r5, r2 // clear TX_SWBUF
  476. .L_epw_setstate:
  477. eors r5, r2
  478. lsrs r2, #16
  479. ands r5, r2
  480. strh r5, [r3]
  481. .L_epw_exit:
  482. pop {r4, r5, r6, pc}
  483. .size _ep_write, .- _ep_write
  484. /* internal function */
  485. /* requester size passed in R2 */
  486. /* result returns in R0 CF=1 if OK*/
  487. _get_next_pma:
  488. push {r1, r3, r4, lr}
  489. movs r1, #16
  490. movs r3, #1
  491. lsls r3, #9 //R3 MAX_PMA_SIZE 512b
  492. ldr r0, =#USB_PMABASE
  493. .L_gnp_chkaddr:
  494. ldrh r4, [r0, #0] //txaddr
  495. tst r4, r4
  496. beq .L_gnp_nxtaddr
  497. cmp r3, r4
  498. blo .L_gnp_nxtaddr
  499. mov r3, r4
  500. .L_gnp_nxtaddr:
  501. adds r0, #8
  502. subs r1, #1
  503. bne .L_gnp_chkaddr
  504. subs r0, r3, r2
  505. blo .L_gnp_exit
  506. cmp r0, #0x20 //check for the pma table overlap
  507. .L_gnp_exit:
  508. pop {r1, r3, r4, pc}
  509. .size _get_next_pma, . - _get_next_pma
  510. .thumb_func
  511. .type _ep_config, %function
  512. /* bool ep_config(uint8_t ep, uint8_t eptype, uint16_t epsize)
  513. * R0 <- ep
  514. * R1 <- eptype
  515. * R2 <- epsize
  516. * result -> R0
  517. */
  518. _ep_config:
  519. push {r4, r5, lr}
  520. movs r3, 0x01
  521. ands r3, r2
  522. adds r2, r3 //R2 -> halfword aligned epsize
  523. movs r3, #0x00 //BULK
  524. cmp r1, #0x02 // is eptype bulk ?
  525. beq .L_epc_settype
  526. movs r3, #0x01 //DBLBULK
  527. cmp r1, #0x06
  528. beq .L_epc_settype
  529. movs r3, #0x02 //CONTROL
  530. cmp r1, #0x00
  531. beq .L_epc_settype
  532. movs r3, #0x04 //ISO
  533. cmp r1, #0x01
  534. beq .L_epc_settype
  535. movs r3, #0x06 //INTERRUPT
  536. .L_epc_settype:
  537. lsls r3, #8
  538. lsls r4, r0, #28
  539. lsrs r4, #28
  540. orrs r3, r4
  541. lsls r4, #2
  542. ldr r5, =#USB_EPBASE
  543. strh r3, [r5, r4] //setup EPTYPE EPKIND EPADDR
  544. cmp r1, #0x00 // is a control ep ?
  545. beq .L_epc_setuptx
  546. cmp r0, #0x80
  547. blo .L_epc_setuprx
  548. .L_epc_setuptx:
  549. ldr r5, =#USB_PMABASE
  550. lsls r4, #2
  551. adds r5, r4
  552. bl _get_next_pma
  553. bcc .L_epc_fail
  554. strh r0, [r5, #TXADDR] //store txaddr or txaddr0
  555. movs r0, #0x00
  556. strh r0, [r5, #TXCOUNT] //store txcnt
  557. cmp r1, #0x06 // is DBLBULK
  558. beq .L_epc_txdbl
  559. ldr r3, =#TX_USTALL //set state NAKED , clr DTOG_TX
  560. cmp r1, #0x01 // is ISO
  561. bne .L_epc_txsetstate //
  562. .L_epc_txdbl:
  563. ldr r3, =#DTX_USTALL //set state VALID clr DTOG_TX & SWBUF_TX
  564. bl _get_next_pma
  565. bcc .L_epc_fail
  566. strh r0, [r5, #TXADDR1] //store txaddr1
  567. movs r0, #0x00
  568. strh r0, [r5, #TXCOUNT1] //store txcnt
  569. .L_epc_txsetstate:
  570. ldr r5, =#USB_EPBASE
  571. lsrs r4, #2
  572. ldrh r0, [r5, r4]
  573. eors r0, r3
  574. lsrs r3, #16
  575. ands r0, r3
  576. strh r0, [r5, r4]
  577. cmp r1, #0x00 //is a control ep ?
  578. bne .L_epc_exit
  579. .L_epc_setuprx:
  580. mov r3, r2
  581. cmp r2, #62
  582. bls .L_epc_rxbb
  583. movs r3, #0x1F
  584. ands r3, r2
  585. bne .L_epc_rxaa
  586. subs r2, #0x20
  587. .L_epc_rxaa:
  588. bics r2, r3
  589. lsrs r3, r2, #4
  590. adds r3, #0x40
  591. adds r2, #0x20
  592. .L_epc_rxbb:
  593. lsls r3, #9
  594. ldr r5, =#USB_PMABASE
  595. lsls r4, #2
  596. adds r5, r4
  597. /* RX or RX1 */
  598. bl _get_next_pma
  599. bcc .L_epc_fail
  600. strh r0, [r5, #RXADDR]
  601. strh r3, [r5, #RXCOUNT]
  602. ldr r0, =#RX_USTALL
  603. /* check if doublebuffered */
  604. cmp r1, 0x06 //if dblbulk
  605. beq .L_epc_rxdbl
  606. cmp r1, 0x01 // iso
  607. bne .L_epc_rxsetstate
  608. .L_epc_rxdbl:
  609. bl _get_next_pma
  610. bcc .L_epc_fail
  611. strh r0, [r5, #RXADDR0] //store rxaddr0
  612. strh r3, [r5, #RXCOUNT0] //store rxcnt0
  613. ldr r0, =#DRX_USTALL
  614. .L_epc_rxsetstate:
  615. ldr r5, =#USB_EPBASE
  616. lsrs r4, #2
  617. ldrh r3, [r5, r4]
  618. eors r3, r0
  619. lsrs r0, #16
  620. ands r3, r0
  621. strh r3, [r5, r4]
  622. .L_epc_exit:
  623. movs r0, #0x01
  624. pop {r4, r5, pc}
  625. .L_epc_fail:
  626. movs r0, #0x00
  627. pop {r4, r5, pc}
  628. .size _ep_config, . - _ep_config
  629. .thumb_func
  630. .type _ep_deconfig, %function
  631. /* void ep_deconfig( uint8_t ep)
  632. * R0 <- ep
  633. */
  634. _ep_deconfig:
  635. lsls r1, r0, #28
  636. lsrs r1, #26
  637. ldr r2, =#USB_EPBASE
  638. ldr r3, =#USB_PMABASE
  639. adds r2, r1
  640. lsls r1, #1
  641. adds r3, r1
  642. /* clearing endpoint register */
  643. ldr r1, =#EP_NOTOG
  644. ldrh r0, [r2]
  645. bics r0, r1
  646. strh r0, [r2]
  647. /* clearing PMA data */
  648. movs r0, #0x00
  649. strh r0, [r3, #TXADDR]
  650. strh r0, [r3, #TXCOUNT]
  651. strh r0, [r3, #RXADDR]
  652. strh r0, [r3, #RXCOUNT]
  653. bx lr
  654. .size _ep_deconfig, . - _ep_config
  655. #define ISTRSHIFT 8
  656. #define ISTRBIT(bit) ((1 << bit) >> ISTRSHIFT)
  657. .thumb_func
  658. .type _evt_poll, %function
  659. /*void evt_poll(usbd_device *dev, usbd_evt_callback callback)*/
  660. _evt_poll:
  661. push {r0, r1, r4, r5}
  662. ldr r3, =#USB_REGBASE
  663. ldrh r0, [r3, #4] //USB->ISTR -> R2
  664. /* ep_index -> R2 */
  665. movs r2, 0x07
  666. ands r2, r0
  667. /* checking USB->ISTR for events */
  668. #if !defined(USBD_SOF_DISABLED)
  669. lsrs r1, r0, #10 //SOFM -> CF
  670. bcs .L_ep_sofm
  671. #endif
  672. lsrs r1, r0, #11 //RESETM -> CF
  673. bcs .L_ep_resetm
  674. lsrs r1, r0, #16 //CTRM -> CF
  675. bcs .L_ep_ctrm
  676. lsrs r1, r0, #14 //ERRM -> CF
  677. bcs .L_ep_errm
  678. lsrs r1, r0, #13 //WKUPM -> CF
  679. bcs .L_ep_wkupm
  680. lsrs r1, r0, #12 //SUSPM -> CF
  681. bcs .L_ep_suspm
  682. /* exit with no callback */
  683. pop {r0, r1, r4 , r5}
  684. bx lr
  685. .L_ep_ctrm:
  686. movs r5, #0x80 // CTR_TX mask to R5
  687. ldr r0,=#USB_EPBASE
  688. lsrs r0, #2
  689. adds r0, r2
  690. lsls r0, #2 // R0 ep register address
  691. ldrh r4, [r0] // R4 EPR valur
  692. lsrs r3, r4, #8 // CTR_TX -> CF
  693. bcc .L_ep_ctr_rx
  694. /* CTR_TX event */
  695. movs r1, #usbd_evt_eptx
  696. orrs r2, r5 // set endpoint tx
  697. b .L_ep_clr_ctr
  698. .L_ep_ctr_rx:
  699. /* CTR_RX RX or SETUP */
  700. lsls r5, #0x08 // set mask to CRT_RX
  701. movs r1, #usbd_evt_eprx
  702. lsls r3, r4, #21 //SETUP -> CF
  703. bcc .L_ep_clr_ctr
  704. movs r1, #usbd_evt_epsetup
  705. .L_ep_clr_ctr:
  706. bics r4, r5 //clear CTR flag
  707. ldr r5, =#EP_NOTOG
  708. ands r4, r5
  709. strh r4, [r0] // store
  710. b .L_ep_callback
  711. .L_ep_errm:
  712. movs r1, #usbd_evt_error
  713. movs r4, #ISTRBIT(13)
  714. b .L_ep_clristr
  715. #if !defined(USBD_SOF_DISABLED)
  716. .L_ep_sofm:
  717. movs r1, #usbd_evt_sof
  718. movs r4, #ISTRBIT(9)
  719. b .L_ep_clristr
  720. #endif
  721. .L_ep_wkupm:
  722. ldrh r1, [r3, #0] //R1 USB->CNTR
  723. movs r5, #0x08
  724. bics r1, r5 //clr FSUSP
  725. strh r1, [r3, #0] //USB->CNTR R2
  726. movs r1, #usbd_evt_wkup
  727. movs r4, #ISTRBIT(12)
  728. b .L_ep_clristr
  729. .L_ep_suspm:
  730. ldrh r1, [r3, #0] //R1 USB->CNTR
  731. movs r5, #0x08
  732. orrs r1, r5 //set FSUSP
  733. strh r1, [r3, #0] //USB->CNTR R2
  734. movs r1, #usbd_evt_susp
  735. movs r4, #ISTRBIT(11)
  736. b .L_ep_clristr
  737. /* do reset routine */
  738. .L_ep_resetm:
  739. movs r1, #7
  740. ldr r2, =#USB_EPBASE
  741. ldr r0, =#USB_PMABASE
  742. ldr r5, =#EP_NOTOG
  743. .L_ep_reset_loop:
  744. ldrh r4, [r2]
  745. bics r4, r5
  746. strh r4, [r2]
  747. movs r4, #0
  748. strh r4, [r0, #TXADDR]
  749. strh r4, [r0, #TXCOUNT]
  750. strh r4, [r0, #RXADDR]
  751. strh r4, [r0, #RXCOUNT]
  752. adds r2, #0x04
  753. adds r0, #0x10
  754. subs r1, #1
  755. bpl .L_ep_reset_loop
  756. movs r2, #0x00
  757. strh r2, [r3, #0x10] // 0 -> USB->BTABLE
  758. movs r1, #usbd_evt_reset
  759. movs r4, #ISTRBIT(10)
  760. .L_ep_clristr:
  761. lsls r4, #ISTRSHIFT
  762. ldrh r0, [r3, #4]
  763. bics r0, r4
  764. strh r0, [r3, #4]
  765. .L_ep_callback:
  766. pop {r0, r3, r4, r5 }
  767. bx r3
  768. .size _evt_poll, . - _evt_poll
  769. .pool
  770. .end
  771. #endif //USBD_STM32L100