memmap.inc 6.4 KB

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  1. /* This file is the part of the Lightweight USB device Stack for STM32 microcontrollers
  2. *
  3. * Copyright ©2016 Dmitry Filimonchuk <dmitrystu[at]gmail[dot]com>
  4. *
  5. * Licensed under the Apache License, Version 2.0 (the "License");
  6. * you may not use this file except in compliance with the License.
  7. * You may obtain a copy of the License at
  8. * http://www.apache.org/licenses/LICENSE-2.0
  9. * Unless required by applicable law or agreed to in writing, software
  10. * distributed under the License is distributed on an "AS IS" BASIS,
  11. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. * See the License for the specific language governing permissions and
  13. * limitations under the License.
  14. */
  15. #if defined(STM32L052xx) || defined(STM32L053xx) || \
  16. defined(STM32L062xx) || defined(STM32L063xx) || \
  17. defined(STM32L072xx) || defined(STM32L073xx) || \
  18. defined(STM32L082xx) || defined(STM32L083xx) || \
  19. defined(STM32F042x6) || defined(STM32F048xx) || \
  20. defined(STM32F070x6) || defined(STM32F070xB) || \
  21. defined(STM32F072xB) || defined(STM32F078xx)
  22. #define USB_EPBASE 0x40005C00
  23. #define USB_REGBASE 0x40005C40
  24. #define USB_CNTR 0x00
  25. #define USB_ISTR 0x04
  26. #define USB_FNR 0x08
  27. #define USB_DADDR 0x0C
  28. #define USB_BTABLE 0x10
  29. #define USB_BCDR 0x18
  30. #define USB_PMABASE 0x40006000
  31. #define RCC_BASE 0x40021000
  32. #define RCC_USBEN 23
  33. #if defined(STM32F042x6) || defined(STM32F048xx) || \
  34. defined(STM32F070x6) || defined(STM32F070xB) || \
  35. defined(STM32F072xB) || defined(STM32F078xx)
  36. #define RCC_APB1RSTR 0x10
  37. #define RCC_APB1ENR 0x1C
  38. #define RCC_APB2ENR 0x18
  39. #define UID_BASE 0x1FFFF7AC
  40. #else
  41. #define RCC_APB1RSTR 0x28
  42. #define RCC_APB1ENR 0x38
  43. #define UID_BASE 0x1FF80050
  44. #endif
  45. #if defined(STM32F042x6) || defined(STM32F048xx) || \
  46. defined(STM32F070x6)
  47. #define SYSCFG_BASE 0x40010000
  48. #define SYSCFG_USBREMAP 4
  49. #endif
  50. #elif defined(STM32L432xx) || defined(STM32L433xx) || \
  51. defined(STM32L442xx) || defined(STM32L443xx) || \
  52. defined(STM32L452xx) || defined(STM32L462xx)
  53. #define USB_EPBASE 0x40006800
  54. #define USB_REGBASE 0x40006840
  55. #define USB_CNTR 0x00
  56. #define USB_ISTR 0x04
  57. #define USB_FNR 0x08
  58. #define USB_DADDR 0x0C
  59. #define USB_BTABLE 0x10
  60. #define USB_BCDR 0x18
  61. #define USB_PMABASE 0x40006C00
  62. #define RCC_BASE 0x40021000
  63. #define RCC_APB1RSTR 0x38
  64. #define RCC_APB1ENR 0x58
  65. #define UID_BASE 0x1FFF7590
  66. #define RCC_USBEN 26
  67. #elif defined(STM32G4)
  68. #define USB_EPBASE 0x40005C00
  69. #define USB_REGBASE 0x40005C40
  70. #define USB_CNTR 0x00
  71. #define USB_ISTR 0x04
  72. #define USB_FNR 0x08
  73. #define USB_DADDR 0x0C
  74. #define USB_BTABLE 0x10
  75. #define USB_BCDR 0x18
  76. #define USB_PMABASE 0x40006000
  77. #define RCC_BASE 0x40021000
  78. #define RCC_APB1RSTR 0x38
  79. #define RCC_APB1ENR 0x58
  80. #define UID_BASE 0x1FFF7590
  81. #define RCC_USBEN 23
  82. #elif defined(STM32L1)
  83. /* common definitions for STM31L100xx STM32L151xx STM32L152xx STM32L162xx */
  84. #define USB_EPBASE 0x40005C00
  85. #define USB_REGBASE 0x40005C40
  86. #define USB_CNTR 0x00
  87. #define USB_ISTR 0x04
  88. #define USB_FNR 0x08
  89. #define USB_DADDR 0x0C
  90. #define USB_BTABLE 0x10
  91. #define USB_PMABASE 0x40006000
  92. #define SYSCFG_BASE 0x40010000
  93. #define SYSCFG_PMC 0x04
  94. #define RCC_BASE 0x40023800
  95. #define RCC_APB1ENR 0x24
  96. #define RCC_APB1RSTR 0x18
  97. #define RCC_APB2ENR 0x20
  98. #if defined(STM32L100xB) || defined(STM32L100xBA) || \
  99. defined(STM32L151xB) || defined(STM32L151xBA)
  100. /* Cat.1 and Cat.2 devices */
  101. #define UID_BASE 0x1FF80050
  102. #else
  103. #define UID_BASE 0x1FF800D0
  104. #endif
  105. #elif defined(STM32F102x6) || defined(STM32F102xB) || \
  106. defined(STM32F103x6) || defined(STM32F103xB) || \
  107. defined(STM32F103xE) || defined(STM32F103xG)
  108. #define USB_EPBASE 0x40005C00
  109. #define USB_REGBASE 0x40005C40
  110. #define USB_CNTR 0x00
  111. #define USB_ISTR 0x04
  112. #define USB_FNR 0x08
  113. #define USB_DADDR 0x0C
  114. #define USB_BTABLE 0x10
  115. #define USB_PMABASE 0x40006000
  116. #define RCC_BASE 0x40021000
  117. #define RCC_APB1RSTR 0x10
  118. #define RCC_APB2ENR 0x18
  119. #define RCC_APB1ENR 0x1C
  120. #define RCC_GPIOAEN 0x02
  121. #define RCC_GPIOBEN 0x03
  122. #define RCC_GPIOCEN 0x04
  123. #define RCC_GPIODEN 0x05
  124. #define RCC_GPIOEEN 0x06
  125. #define RCC_GPIOFEN 0x07
  126. #define UID_BASE 0x1FFFF7E8
  127. #define GPIOA 0x40010800
  128. #define GPIOB 0x40010C00
  129. #define GPIOC 0x40011000
  130. #define GPIOD 0x40011400
  131. #define GPIOE 0x40011800
  132. #define GPIOF 0x40011C00
  133. #define GPIOG 0x40012000
  134. #define GPIO_CRL 0x00
  135. #define GPIO_CRH 0x04
  136. #define GPIO_IDR 0x08
  137. #define GPIO_BSRR 0x10
  138. #elif defined(STM32F303x8) || defined(STM32F303xC) || \
  139. defined(STM32F303xE) || defined(STM32F373xC)
  140. #define USB_EPBASE 0x40005C00
  141. #define USB_REGBASE 0x40005C40
  142. #define USB_CNTR 0x00
  143. #define USB_ISTR 0x04
  144. #define USB_FNR 0x08
  145. #define USB_DADDR 0x0C
  146. #define USB_BTABLE 0x10
  147. #define USB_PMABASE 0x40006000
  148. #define RCC_BASE 0x40021000
  149. #define RCC_APB1ENR 0x1C
  150. #define RCC_APB1RSTR 0x10
  151. #define RCC_AHBENR 0x14
  152. #define RCC_GPIOAEN 0x11
  153. #define RCC_GPIOBEN 0x12
  154. #define RCC_GPIOCEN 0x13
  155. #define RCC_GPIODEN 0x14
  156. #define RCC_GPIOEEN 0x15
  157. #define RCC_GPIOFEN 0x16
  158. #define RCC_GPIOGEN 0x17
  159. #define RCC_GPIOHEN 0x10
  160. #define UID_BASE 0x1FFFF7AC
  161. #define GPIOA 0x48000000
  162. #define GPIOB 0x48000400
  163. #define GPIOC 0x48000800
  164. #define GPIOD 0x48000C00
  165. #define GPIOE 0x48001000
  166. #define GPIOF 0x48001400
  167. #define GPIO_MODER 0x00
  168. #define GPIO_BSRR 0x18
  169. #else
  170. #error Unsupported MCU
  171. #endif