usbd_stm32f103_devfs.c 17 KB

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  1. /* This file is the part of the Lightweight USB device Stack for STM32 microcontrollers
  2. *
  3. * Copyright ©2016 Dmitry Filimonchuk <dmitrystu[at]gmail[dot]com>
  4. * Copyright ©2017 Max Chan <max[at]maxchan[dot]info>
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the "License");
  7. * you may not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. * http://www.apache.org/licenses/LICENSE-2.0
  10. * Unless required by applicable law or agreed to in writing, software
  11. * distributed under the License is distributed on an "AS IS" BASIS,
  12. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13. * See the License for the specific language governing permissions and
  14. * limitations under the License.
  15. */
  16. #include <stdint.h>
  17. #include <stdbool.h>
  18. #include "stm32.h"
  19. #include "usb.h"
  20. #if defined(USBD_STM32F103)
  21. #define USB_EP_SWBUF_TX USB_EP_DTOG_RX
  22. #define USB_EP_SWBUF_RX USB_EP_DTOG_TX
  23. #define EP_TOGGLE_SET(epr, bits, mask) *(epr) = (*(epr) ^ (bits)) & (USB_EPREG_MASK | (mask))
  24. #define EP_TX_STALL(epr) EP_TOGGLE_SET((epr), USB_EP_TX_STALL, USB_EPTX_STAT)
  25. #define EP_RX_STALL(epr) EP_TOGGLE_SET((epr), USB_EP_RX_STALL, USB_EPRX_STAT)
  26. #define EP_TX_UNSTALL(epr) EP_TOGGLE_SET((epr), USB_EP_TX_NAK, USB_EPTX_STAT | USB_EP_DTOG_TX)
  27. #define EP_RX_UNSTALL(epr) EP_TOGGLE_SET((epr), USB_EP_RX_VALID, USB_EPRX_STAT | USB_EP_DTOG_RX)
  28. #define EP_DTX_UNSTALL(epr) EP_TOGGLE_SET((epr), USB_EP_TX_VALID, USB_EPTX_STAT | USB_EP_DTOG_TX | USB_EP_SWBUF_TX)
  29. #define EP_DRX_UNSTALL(epr) EP_TOGGLE_SET((epr), USB_EP_RX_VALID | USB_EP_SWBUF_RX, USB_EPRX_STAT | USB_EP_DTOG_RX | USB_EP_SWBUF_RX)
  30. #define EP_TX_VALID(epr) EP_TOGGLE_SET((epr), USB_EP_TX_VALID, USB_EPTX_STAT)
  31. #define EP_RX_VALID(epr) EP_TOGGLE_SET((epr), USB_EP_RX_VALID, USB_EPRX_STAT)
  32. #define STATUS_VAL(x) (x)
  33. typedef union _pma_table pma_table;
  34. #if defined(STM32F302x8) || defined(STM32F302xE) || defined(STM32F303xE)
  35. #if !defined(USB_PMASIZE)
  36. #warning PMA memory size is not defined. Use 768 bytes by default
  37. #define USB_PMASIZE 0x300
  38. #endif
  39. #define PMA_STEP 1
  40. typedef struct {
  41. uint16_t addr;
  42. uint16_t cnt;
  43. } pma_rec;
  44. inline static pma_table *EPT(uint8_t ep) {
  45. return (pma_table*)((ep & 0x07) * 8 + USB_PMAADDR);
  46. }
  47. inline static uint16_t *PMA(uint16_t addr) {
  48. return (uint16_t*)(USB_PMAADDR + addr);
  49. }
  50. #else
  51. #if !defined(USB_PMASIZE)
  52. #warning PMA memory size is not defined. Use 512 bytes by default
  53. #define USB_PMASIZE 0x200
  54. #endif
  55. #define PMA_STEP 2
  56. typedef struct {
  57. uint16_t addr;
  58. uint16_t :16;
  59. uint16_t cnt;
  60. uint16_t :16;
  61. } pma_rec;
  62. inline static pma_table *EPT(uint8_t ep) {
  63. return (pma_table*)((ep & 0x07) * 16 + USB_PMAADDR);
  64. }
  65. inline static uint16_t *PMA(uint16_t addr) {
  66. return (uint16_t*)(USB_PMAADDR + 2 * addr);
  67. }
  68. #endif
  69. union _pma_table {
  70. struct {
  71. pma_rec tx;
  72. pma_rec rx;
  73. };
  74. struct {
  75. pma_rec tx0;
  76. pma_rec tx1;
  77. };
  78. struct {
  79. pma_rec rx0;
  80. pma_rec rx1;
  81. };
  82. };
  83. /** \brief Helper function. Enables GPIOx for DP.
  84. * Looks ugly. But compiler should optimize this
  85. * to single line
  86. */
  87. inline static void set_gpiox() {
  88. #if defined(STM32F1) && defined(USBD_DP_PORT)
  89. if (USBD_DP_PORT == GPIOA) {RCC->APB2ENR |= RCC_APB2ENR_IOPAEN; return;}
  90. if (USBD_DP_PORT == GPIOB) {RCC->APB2ENR |= RCC_APB2ENR_IOPBEN; return;}
  91. if (USBD_DP_PORT == GPIOC) {RCC->APB2ENR |= RCC_APB2ENR_IOPCEN; return;}
  92. if (USBD_DP_PORT == GPIOD) {RCC->APB2ENR |= RCC_APB2ENR_IOPDEN; return;}
  93. #if defined(GPIOE)
  94. if (USBD_DP_PORT == GPIOE) {RCC->APB2ENR |= RCC_APB2ENR_IOPEEN; return;}
  95. #endif
  96. #if defined(GPIOF)
  97. if (USBD_DP_PORT = GPIOF) {RCC->APB2ENR |= RCC_APB2ENR_IOPFEN; return;}
  98. #endif
  99. #elif defined(STM32F3) && defined(USBD_DP_PORT)
  100. if (USBD_DP_PORT == GPIOA) {RCC->AHBENR |= RCC_AHBENR_GPIOAEN; return;}
  101. if (USBD_DP_PORT == GPIOB) {RCC->AHBENR |= RCC_AHBENR_GPIOBEN; return;}
  102. if (USBD_DP_PORT == GPIOC) {RCC->AHBENR |= RCC_AHBENR_GPIOCEN; return;}
  103. if (USBD_DP_PORT == GPIOD) {RCC->AHBENR |= RCC_AHBENR_GPIODEN; return;}
  104. #if defined(GPIOE)
  105. if (USBD_DP_PORT == GPIOE) {RCC->AHBENR |= RCC_AHBENR_GPIOEEN; return;}
  106. #endif
  107. #if defined(GPIOF)
  108. if (USBD_DP_PORT == GPIOF) {RCC->AHBENR |= RCC_AHBENR_GPIOFEN; return;}
  109. #endif
  110. #if defined(GPIOG)
  111. if (USBD_DP_PORT == GPIOG) {RCC->AHBENR |= RCC_AHBENR_GPIOGEN; return;}
  112. #endif
  113. #if defined(GPIOH)
  114. if (USBD_DP_PORT == GPIOH) {RCC->AHBENR |= RCC_AHBENR_GPIOHEN; return;}
  115. #endif
  116. #endif
  117. return;
  118. }
  119. /** \brief Helper function. Returns pointer to the endpoint control register.
  120. */
  121. inline static volatile uint16_t *EPR(uint8_t ep) {
  122. return (uint16_t*)((ep & 0x07) * 4 + USB_BASE);
  123. }
  124. /** \brief Helper function. Returns next available PMA buffer.
  125. *
  126. * \param sz uint16_t Requested buffer size.
  127. * \return uint16_t Buffer address for PMA table.
  128. * \note PMA buffers grown from top to bottom like stack.
  129. */
  130. static uint16_t get_next_pma(uint16_t sz) {
  131. unsigned _result = USB_PMASIZE;
  132. for (int i = 0; i < 8; i++) {
  133. pma_table *tbl = EPT(i);
  134. if ((tbl->tx.addr) && (tbl->tx.addr < _result)) _result = tbl->tx.addr;
  135. if ((tbl->rx.addr) && (tbl->rx.addr < _result)) _result = tbl->rx.addr;
  136. }
  137. return (_result < (0x020 + sz)) ? 0 : (_result - sz);
  138. }
  139. uint32_t getinfo(void) {
  140. if (!(RCC->APB1ENR & RCC_APB1ENR_USBEN)) return STATUS_VAL(0);
  141. #if defined(USBD_DP_PORT) && defined(USBD_DP_PIN)
  142. if (USBD_DP_PORT->IDR && _BV(USBD_DP_PIN)) return STATUS_VAL(USBD_HW_ENABLED | USBD_HW_SPEED_FS);
  143. return STATUS_VAL(USBD_HW_ENABLED);
  144. #else
  145. return STATUS_VAL(USBD_HW_ENABLED | USBD_HW_SPEED_FS);
  146. #endif
  147. }
  148. void ep_setstall(uint8_t ep, bool stall) {
  149. volatile uint16_t *reg = EPR(ep);
  150. /* ISOCHRONOUS endpoint can't be stalled or unstalled */
  151. if (USB_EP_ISOCHRONOUS == (*reg & USB_EP_T_FIELD)) return;
  152. /* If it's an IN endpoint */
  153. if (ep & 0x80) {
  154. /* DISABLED endpoint can't be stalled or unstalled */
  155. if (USB_EP_TX_DIS == (*reg & USB_EPTX_STAT)) return;
  156. if (stall) {
  157. EP_TX_STALL(reg);
  158. } else {
  159. /* if it's a doublebuffered endpoint */
  160. if ((USB_EP_KIND | USB_EP_BULK) == (*reg & (USB_EP_T_FIELD | USB_EP_KIND))) {
  161. /* set endpoint to VALID and clear DTOG_TX & SWBUF_TX */
  162. EP_DTX_UNSTALL(reg);
  163. } else {
  164. /* set endpoint to NAKED and clear DTOG_TX */
  165. EP_TX_UNSTALL(reg);
  166. }
  167. }
  168. } else {
  169. if (USB_EP_RX_DIS == (*reg & USB_EPRX_STAT)) return;
  170. if (stall) {
  171. EP_RX_STALL(reg);
  172. } else {
  173. /* if it's a doublebuffered endpoint */
  174. if ((USB_EP_KIND | USB_EP_BULK) == (*reg & (USB_EP_T_FIELD | USB_EP_KIND))) {
  175. /* set endpoint to VALID, clear DTOG_RX, set SWBUF_RX */
  176. EP_DRX_UNSTALL(reg);
  177. } else {
  178. /* set endpoint to VALID and clear DTOG_RX */
  179. EP_RX_UNSTALL(reg);
  180. }
  181. }
  182. }
  183. }
  184. bool ep_isstalled(uint8_t ep) {
  185. if (ep & 0x80) {
  186. return (USB_EP_TX_STALL == (USB_EPTX_STAT & *EPR(ep)));
  187. } else {
  188. return (USB_EP_RX_STALL == (USB_EPRX_STAT & *EPR(ep)));
  189. }
  190. }
  191. uint8_t connect(bool connect) {
  192. #if defined(USBD_DP_PORT) && defined(USBD_DP_PIN) && defined(STM32F3)
  193. uint32_t _t = USBD_DP_PORT->MODER & ~(0x03 << (2 * USBD_DP_PIN));
  194. if (connect) {
  195. _t |= (0x01 << (2 * USBD_DP_PIN));
  196. USBD_DP_PORT->BSRR = (0x0001 << USBD_DP_PIN);
  197. }
  198. USBD_DP_PORT->MODER = _t;
  199. #elif defined(USBD_DP_PORT) && defined(USBD_DP_PIN) && defined(STM32F1)
  200. #if (USBD_DP_PIN < 8)
  201. uint32_t _t = USBD_DP_PORT->CRL & ~(0x0F << (4 * USBD_DP_PIN));
  202. if (connect) {
  203. _t |= (0x02 << (4 * USBD_DP_PIN));
  204. USBD_DP_PORT->BSRR = (0x0001 << USBD_DP_PIN);
  205. } else {
  206. _t |= (0x04 << (4 * USBD_DP_PIN));
  207. }
  208. USBD_DP_PORT->CRL = _t;
  209. #else
  210. uint32_t _t = USBD_DP_PORT->CRH & ~(0x0F << (4 * (USBD_DP_PIN - 8)));
  211. if (connect) {
  212. _t |= (0x02 << (4 * (USBD_DP_PIN - 8)));
  213. USBD_DP_PORT->BSRR = (0x0001 << USBD_DP_PIN);
  214. } else {
  215. _t |= (0x04 << (4 * (USBD_DP_PIN - 8)));
  216. }
  217. USBD_DP_PORT->CRH = _t;
  218. #endif
  219. #endif
  220. return usbd_lane_unk;
  221. }
  222. void enable(bool enable) {
  223. if (enable) {
  224. set_gpiox();
  225. RCC->APB1ENR |= RCC_APB1ENR_USBEN;
  226. RCC->APB1RSTR |= RCC_APB1RSTR_USBRST;
  227. RCC->APB1RSTR &= ~RCC_APB1RSTR_USBRST;
  228. USB->CNTR = USB_CNTR_CTRM | USB_CNTR_RESETM | USB_CNTR_ERRM |
  229. #if !defined(USBD_SOF_DISABLED)
  230. USB_CNTR_SOFM |
  231. #endif
  232. USB_CNTR_SUSPM | USB_CNTR_WKUPM;
  233. } else if (RCC->APB1ENR & RCC_APB1ENR_USBEN) {
  234. RCC->APB1RSTR |= RCC_APB1RSTR_USBRST;
  235. RCC->APB1ENR &= ~RCC_APB1ENR_USBEN;
  236. /* disconnecting DP if configured */
  237. connect(0);
  238. }
  239. }
  240. void setaddr (uint8_t addr) {
  241. USB->DADDR = USB_DADDR_EF | addr;
  242. }
  243. bool ep_config(uint8_t ep, uint8_t eptype, uint16_t epsize) {
  244. volatile uint16_t *reg = EPR(ep);
  245. pma_table *tbl = EPT(ep);
  246. /* epsize should be 16-bit aligned */
  247. if (epsize & 0x01) epsize++;
  248. switch (eptype) {
  249. case USB_EPTYPE_CONTROL:
  250. *reg = USB_EP_CONTROL | (ep & 0x07);
  251. break;
  252. case USB_EPTYPE_ISOCHRONUS:
  253. *reg = USB_EP_ISOCHRONOUS | (ep & 0x07);
  254. break;
  255. case USB_EPTYPE_BULK:
  256. *reg = USB_EP_BULK | (ep & 0x07);
  257. break;
  258. case USB_EPTYPE_BULK | USB_EPTYPE_DBLBUF:
  259. *reg = USB_EP_BULK | USB_EP_KIND | (ep & 0x07);
  260. break;
  261. default:
  262. *reg = USB_EP_INTERRUPT | (ep & 0x07);
  263. break;
  264. }
  265. /* if it TX or CONTROL endpoint */
  266. if ((ep & 0x80) || (eptype == USB_EPTYPE_CONTROL)) {
  267. uint16_t _pma;
  268. _pma = get_next_pma(epsize);
  269. if (_pma == 0) return false;
  270. tbl->tx.addr = _pma;
  271. tbl->tx.cnt = 0;
  272. if ((eptype == USB_EPTYPE_ISOCHRONUS) ||
  273. (eptype == (USB_EPTYPE_BULK | USB_EPTYPE_DBLBUF))) {
  274. _pma = get_next_pma(epsize);
  275. if (_pma == 0) return false;
  276. tbl->tx1.addr = _pma;
  277. tbl->tx1.cnt = 0;
  278. EP_DTX_UNSTALL(reg);
  279. } else {
  280. EP_TX_UNSTALL(reg);
  281. }
  282. }
  283. if (!(ep & 0x80)) {
  284. uint16_t _rxcnt;
  285. uint16_t _pma;
  286. if (epsize > 62) {
  287. if (epsize & 0x1F) {
  288. epsize &= 0x1F;
  289. } else {
  290. epsize -= 0x20;
  291. }
  292. _rxcnt = 0x8000 | (epsize << 5);
  293. epsize += 0x20;
  294. } else {
  295. _rxcnt = epsize << 9;
  296. }
  297. _pma = get_next_pma(epsize);
  298. if (_pma == 0) return false;
  299. tbl->rx.addr = _pma;
  300. tbl->rx.cnt = _rxcnt;
  301. if ((eptype == USB_EPTYPE_ISOCHRONUS) ||
  302. (eptype == (USB_EPTYPE_BULK | USB_EPTYPE_DBLBUF))) {
  303. _pma = get_next_pma(epsize);
  304. if (_pma == 0) return false;
  305. tbl->rx0.addr = _pma;
  306. tbl->rx0.cnt = _rxcnt;
  307. EP_DRX_UNSTALL(reg);
  308. } else {
  309. EP_RX_UNSTALL(reg);
  310. }
  311. }
  312. return true;
  313. }
  314. void ep_deconfig(uint8_t ep) {
  315. pma_table *ept = EPT(ep);
  316. *EPR(ep) &= ~USB_EPREG_MASK;
  317. ept->rx.addr = 0;
  318. ept->rx.cnt = 0;
  319. ept->tx.addr = 0;
  320. ept->tx.cnt = 0;
  321. }
  322. static uint16_t pma_read (uint8_t *buf, uint16_t blen, pma_rec *rx) {
  323. uint16_t *pma = PMA(rx->addr);
  324. uint16_t rxcnt = rx->cnt & 0x03FF;
  325. rx->cnt &= ~0x3FF;
  326. if (blen > rxcnt) {
  327. blen = rxcnt;
  328. }
  329. rxcnt = blen;
  330. while (blen) {
  331. uint16_t _t = *pma;
  332. *buf++ = _t & 0xFF;
  333. if (--blen) {
  334. *buf++ = _t >> 8;
  335. pma += PMA_STEP;
  336. blen--;
  337. } else break;
  338. }
  339. return rxcnt;
  340. }
  341. int32_t ep_read(uint8_t ep, void *buf, uint16_t blen) {
  342. pma_table *tbl = EPT(ep);
  343. volatile uint16_t *reg = EPR(ep);
  344. switch (*reg & (USB_EPRX_STAT | USB_EP_T_FIELD | USB_EP_KIND)) {
  345. /* doublebuffered bulk endpoint */
  346. case (USB_EP_RX_VALID | USB_EP_BULK | USB_EP_KIND):
  347. /* switching SWBUF if EP is NAKED */
  348. switch (*reg & (USB_EP_DTOG_RX | USB_EP_SWBUF_RX)) {
  349. case 0:
  350. case (USB_EP_DTOG_RX | USB_EP_SWBUF_RX):
  351. *reg = (*reg & USB_EPREG_MASK) | USB_EP_SWBUF_RX;
  352. default:
  353. break;
  354. }
  355. if (*reg & USB_EP_SWBUF_RX) {
  356. return pma_read(buf, blen, &(tbl->rx1));
  357. } else {
  358. return pma_read(buf, blen, &(tbl->rx0));
  359. }
  360. /* isochronous endpoint */
  361. case (USB_EP_RX_VALID | USB_EP_ISOCHRONOUS):
  362. if (*reg & USB_EP_DTOG_RX) {
  363. return pma_read(buf, blen, &(tbl->rx1));
  364. } else {
  365. return pma_read(buf, blen, &(tbl->rx0));
  366. }
  367. /* regular endpoint */
  368. case (USB_EP_RX_NAK | USB_EP_BULK):
  369. case (USB_EP_RX_NAK | USB_EP_CONTROL):
  370. case (USB_EP_RX_NAK | USB_EP_INTERRUPT):
  371. {
  372. int32_t res = pma_read(buf, blen, &(tbl->rx));
  373. /* setting endpoint to VALID state */
  374. EP_RX_VALID(reg);
  375. return res;
  376. }
  377. /* invalid or not ready */
  378. default:
  379. return -1;
  380. }
  381. }
  382. static void pma_write(const uint8_t *buf, uint16_t blen, pma_rec *tx) {
  383. uint16_t *pma = PMA(tx->addr);
  384. tx->cnt = blen;
  385. while (blen > 1) {
  386. *pma = buf[1] << 8 | buf[0];
  387. pma += PMA_STEP;
  388. buf += 2;
  389. blen -= 2;
  390. }
  391. if (blen) *pma = *buf;
  392. }
  393. int32_t ep_write(uint8_t ep, void *buf, uint16_t blen) {
  394. pma_table *tbl = EPT(ep);
  395. volatile uint16_t *reg = EPR(ep);
  396. switch (*reg & (USB_EPTX_STAT | USB_EP_T_FIELD | USB_EP_KIND)) {
  397. /* doublebuffered bulk endpoint */
  398. case (USB_EP_TX_NAK | USB_EP_BULK | USB_EP_KIND):
  399. if (*reg & USB_EP_SWBUF_TX) {
  400. pma_write(buf, blen, &(tbl->tx1));
  401. } else {
  402. pma_write(buf, blen, &(tbl->tx0));
  403. }
  404. *reg = (*reg & USB_EPREG_MASK) | USB_EP_SWBUF_TX;
  405. break;
  406. /* isochronous endpoint */
  407. case (USB_EP_TX_VALID | USB_EP_ISOCHRONOUS):
  408. if (!(*reg & USB_EP_DTOG_TX)) {
  409. pma_write(buf, blen, &(tbl->tx1));
  410. } else {
  411. pma_write(buf, blen, &(tbl->tx0));
  412. }
  413. break;
  414. /* regular endpoint */
  415. case (USB_EP_TX_NAK | USB_EP_BULK):
  416. case (USB_EP_TX_NAK | USB_EP_CONTROL):
  417. case (USB_EP_TX_NAK | USB_EP_INTERRUPT):
  418. pma_write(buf, blen, &(tbl->tx));
  419. EP_TX_VALID(reg);
  420. break;
  421. /* invalid or not ready */
  422. default:
  423. return -1;
  424. }
  425. return blen;
  426. }
  427. uint16_t get_frame (void) {
  428. return USB->FNR & USB_FNR_FN;
  429. }
  430. void evt_poll(usbd_device *dev, usbd_evt_callback callback) {
  431. uint8_t _ev, _ep;
  432. uint16_t _istr = USB->ISTR;
  433. _ep = _istr & USB_ISTR_EP_ID;
  434. if (_istr & USB_ISTR_CTR) {
  435. volatile uint16_t *reg = EPR(_ep);
  436. if (*reg & USB_EP_CTR_TX) {
  437. *reg &= (USB_EPREG_MASK ^ USB_EP_CTR_TX);
  438. _ep |= 0x80;
  439. _ev = usbd_evt_eptx;
  440. } else {
  441. *reg &= (USB_EPREG_MASK ^ USB_EP_CTR_RX);
  442. _ev = (*reg & USB_EP_SETUP) ? usbd_evt_epsetup : usbd_evt_eprx;
  443. }
  444. } else if (_istr & USB_ISTR_RESET) {
  445. USB->ISTR &= ~USB_ISTR_RESET;
  446. USB->BTABLE = 0;
  447. for (int i = 0; i < 8; i++) {
  448. ep_deconfig(i);
  449. }
  450. _ev = usbd_evt_reset;
  451. #if !defined(USBD_SOF_DISABLED)
  452. } else if (_istr & USB_ISTR_SOF) {
  453. _ev = usbd_evt_sof;
  454. USB->ISTR &= ~USB_ISTR_SOF;
  455. #endif
  456. } else if (_istr & USB_ISTR_WKUP) {
  457. _ev = usbd_evt_wkup;
  458. USB->CNTR &= ~USB_CNTR_FSUSP;
  459. USB->ISTR &= ~USB_ISTR_WKUP;
  460. } else if (_istr & USB_ISTR_SUSP) {
  461. _ev = usbd_evt_susp;
  462. USB->CNTR |= USB_CNTR_FSUSP;
  463. USB->ISTR &= ~USB_ISTR_SUSP;
  464. } else if (_istr & USB_ISTR_ERR) {
  465. USB->ISTR &= ~USB_ISTR_ERR;
  466. _ev = usbd_evt_error;
  467. } else {
  468. return;
  469. }
  470. callback(dev, _ev, _ep);
  471. }
  472. static uint32_t fnv1a32_turn (uint32_t fnv, uint32_t data ) {
  473. for (int i = 0; i < 4 ; i++) {
  474. fnv ^= (data & 0xFF);
  475. fnv *= 16777619;
  476. data >>= 8;
  477. }
  478. return fnv;
  479. }
  480. uint16_t get_serialno_desc(void *buffer) {
  481. struct usb_string_descriptor *dsc = buffer;
  482. uint16_t *str = dsc->wString;
  483. uint32_t fnv = 2166136261;
  484. fnv = fnv1a32_turn(fnv, *(uint32_t*)(UID_BASE + 0x00));
  485. fnv = fnv1a32_turn(fnv, *(uint32_t*)(UID_BASE + 0x04));
  486. fnv = fnv1a32_turn(fnv, *(uint32_t*)(UID_BASE + 0x08));
  487. for (int i = 28; i >= 0; i -= 4 ) {
  488. uint16_t c = (fnv >> i) & 0x0F;
  489. c += (c < 10) ? '0' : ('A' - 10);
  490. *str++ = c;
  491. }
  492. dsc->bDescriptorType = USB_DTYPE_STRING;
  493. dsc->bLength = 18;
  494. return 18;
  495. }
  496. __attribute__((externally_visible)) const struct usbd_driver usbd_devfs = {
  497. getinfo,
  498. enable,
  499. connect,
  500. setaddr,
  501. ep_config,
  502. ep_deconfig,
  503. ep_read,
  504. ep_write,
  505. ep_setstall,
  506. ep_isstalled,
  507. evt_poll,
  508. get_frame,
  509. get_serialno_desc,
  510. };
  511. #endif //USBD_STM32F103